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参数资料
| 型号： | TSC8051C1XXX-12IDD |
| 元件分类： | 8位微控制器 |
| 英文描述： | 8-Bit Microcontroller for Digital Computer Monitors |
| 中文描述： | 8位数字的电脑显示器微控制器 |
| 文件页数： | 10/31页 |
| 文件大小： | 321K |
| 代理商： | TSC8051C1XXX-12IDD |
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TSC8051C1
Rev. D (14 Jan. 97)
18
MATRA MHS
HOP
PIN
P3.4/T0/HSYNC
P3.5/HOUT
PIN
8051 CORE
P3.5
HOE
HOS
MUX
VOP
PIN
P3.2/INT0/HSYNC
P3.3/VOUT
PIN
8051 CORE
P3.3
VOE
VOS
MUX
Figure 12. Buffered HSYNC and VSYNC block
diagram
7.4. HSYNC and VSYNC Inputs
EICON is used to control INT0VSYNC input. Thus, an
interrupt on either falling or rising edge and on either
high or low level can be requested. Figure 13. shows the
programmable INT0/VSYNC input block diagram.
EICON is also used to control T0/HSYNC input as short
pulses input capture to be able to count them with timer
0. Pulse duration shorter than 1 clock period is rejected;
depending on the position of the sampling point in the
pulse, pulse duration longer than 1 clock period and
shorter than 1.5 clock period may be rejected or
accepted; and pulse duration longer than 1.5 clock
period is accepted. Moreover selection of negative or
positive pulses can be programmed.
Accepted pulse is lengthened up to 1 cycle period to be
sampled by the 8051 core (one time per machine cycle:
12 clock periods), this implies that the maximum pulse
frequency
is
unchanged
and
equal
to
fOSC/24.
Figure 14. shows the programmable T0/HSYNC input
block diagram. The Digital Timer Delay samples
T0/HSYNC pulses and rejects or lengthens them.
EICON: External Input Control Register
MSB
SFR E4h
LSB
–
T0L
T0S
I0L
Symbol
Position
Name and Function
I0L
EICON.0
INT0/VSYNC input Level bit. Setting this bit inverts INT0/VSYNC input signal.
Clearing it allows standard use of INT0/VSYNC input.
T0S
EICON.1
T0/HSYNC input Selection bit. Setting this bit allows short pulse capture. Clearing it
allows standard use of T0/HSYNC input.
T0L
EICON.2
T0/HSYNC input Level bit. Setting this bit allows positive pulse capture. Clearing it
allows negative pulse capture.
EICON is a write only register. Its value after reset is 00h
which allows standard INT0 and T0 inputs feature.
EICON is using TSC8051C1 Special Function Register
address, E4h.
INT0
P3.2/INT0/VSYNC
PIN
MUX
I0L
Figure 13. INT0/VSYNC input block diagram
P3.4/T0/HSYNC
Digital
Time
Delay
PIN
T0
MUX
T0S
T0L
fOSC
Figure 14. T0/HSYNC input block diagram
7.5. SIO1, I2C Serial I/O
SIO1 provides a serial interface that meets the I2C bus
specification and supports the master transfer modes
with multimaster capability from and to the I2C bus. The
SIO1 logic handles bytes transfer autonomously. It also
keeps track of serial transfers and a status register
reflects the status of SIO1 and the I2C bus.
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| TSC8051C1XXX-12IDR | 8-Bit Microcontroller for Digital Computer Monitors |
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| TSC8051C1XXX-16CBR | 8-Bit Microcontroller for Digital Computer Monitors |
| TSC8051C1XXX-16CEB | 8-Bit Microcontroller for Digital Computer Monitors |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| TSC8051C1XXX-12IDR | 制造商:TEMIC 制造商全称:TEMIC Semiconductors 功能描述:8-Bit Microcontroller for Digital Computer Monitors |
| TSC8051C1XXX-12IEB | 制造商:TEMIC 制造商全称:TEMIC Semiconductors 功能描述:8-Bit Microcontroller for Digital Computer Monitors |
| TSC8051C1XXX-12IED | 制造商:TEMIC 制造商全称:TEMIC Semiconductors 功能描述:8-Bit Microcontroller for Digital Computer Monitors |
| TSC8051C1XXX-12IER | 制造商:TEMIC 制造商全称:TEMIC Semiconductors 功能描述:8-Bit Microcontroller for Digital Computer Monitors |
| TSC8051C1XXX-12IGB | 制造商:TEMIC 制造商全称:TEMIC Semiconductors 功能描述:8-Bit Microcontroller for Digital Computer Monitors |
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