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参数资料
| 型号： | TXS02326RGER |
| 厂商： | Texas Instruments |
| 文件页数： | 3/35页 |
| 文件大小： | 0K |
| 描述： | IC SIM CARD MUX 2:1 24VQFN |
| 产品培训模块： | Voltage Level Translation |
| 标准包装： | 1 |
| 应用： | 移动电话 |
| 接口： | I²C |
| 电源电压： | 1.7 V ~ 3.3 V |
| 封装/外壳： | 24-VFQFN 裸露焊盘 |
| 供应商设备封装： | 24-VQFN 裸露焊盘（4x4） |
| 包装： | 标准包装 |
| 安装类型： | 表面贴装 |
| 其它名称： | 296-27948-6 |
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CLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
4
2
3
4
3
1
2
0
4
DEB CNT
BSI
BSI_DEB
IRQ
SIMCLK
SIM1 RST
SIM1 CLK
SIM1 I/O
SIM2 RST
SIM2 CLK
SIM2 I/O
Latched RST
Latched Clock
Latched Data
SIM1 VCC
SIM2 VCC
Active Data
SCES795C
– SEPTEMBER 2010 – REVISED FEBRUARY 2011
BSI / SDN DEBOUNCE AND AUTOMATIC SHUTDOWN SEQUENCE TIMING
There are two debounce counters: one each for the BSI and SDN inputs. For each counter, when the device is
reset or the related input is
“false”, the counter is loaded with the value in the associated Debounce Counter
register and the debounced signal (i.e. BSI_DEB or SDN_DEB) is subsequently set to a
“false” state. When the
related input becomes
“true”, the counter begins counting down on subsequent CLK rising-edges. (CLK is either
the internal or external 32 kHz clock as selected by Clock Source Select)
If the input changes state during the count, the counter is again loaded with the register value. The debounce
counter propagates the input signal to the output when the counter expires.
For BSI and BSI_DEB, the
“true” state is high. For SDN and SDN_DEB, the “true” state is the state stored in the
SDN Detection Level register. Once either count reaches zero, the debounced signal switches to the
“true” state
on the next CLK rising edge.
If BSI_DEB goes high and Battery Removal Interrupt (bit 2 of the Device Control Register) is 1, an interrupt is
generated and appears on IRQ. Also, if BSI_DEB goes high and BSI Detection Control (bit 4 of the Device
Control Register) is 0, the Automatic Shutdown sequence begins for both SIM
’s.
If SDN_DEB goes
“true” and SDN Detection Interrupt (bit 5 of the Device Control Register) is 1, an interrupt is
generated and appears on IRQ. Also, if SDN_DEB goes
“true” and SDN Detection Control (bit 7 of the Device
Control Register) is 0, the Automatic Shutdown sequence begins for SIM2 only, leaving SIM1 unaffected.
Figure 2. BSI Debounce Timing
– SIM1 Active and SIM2 Isolated
Notes:
BSI debounce count value set to 4
SIM1 Active, SIM2 powered but Isolated
BSI Detection Control set to 0
Battery Removal Interrupt set to 1
Once BSI is high for four cycles, BSI_DEB goes high causing automatic shutdown sequence on both SIMs.
Since SIM1 is active with SIMCLK running, it follows the staged shutdown sequence. Since SIM2 is powered up
but inactive, it follows the instant shutdown sequence.
2010–2011, Texas Instruments Incorporated
11
Product Folder Link(s): TXS02326
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