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参数资料
| 型号： | UPD750004GBA-XXX-3BS-MTX |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP44 |
| 封装： | 10 X 10 MM, 0.80 MM PITCH, PLASTIC, QFP-44 |
| 文件页数： | 52/86页 |
| 文件大小： | 626K |
| 代理商： | UPD750004GBA-XXX-3BS-MTX |
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PD750004, 750006, 750008, 750004(A), 750006(A), 750008(A)
54
Data Sheet U10738EJ3V2DS
Resonator
Ceramic
resonator
Crystal
External
clock
Recommended
constant
CHARACTERISTICS OF THE MAIN SYSTEM CLOCK OSCILLATOR (TA = -40 to +85
°C)
Notes 1. The oscillator frequency and X1 input frequency indicate only the oscillator characteristics. See the item
of AC characteristics for the instruction execution time.
2. When the supply voltage is 2.2 V
≤ VDD < 2.7 V and the oscillator frequency is 4.7 MHz < fX ≤ 6.0 MHz,
set the processor clock control register (PCC) to a value other than 0011. When the PCC is set to 0011,
the time for one machine cycle cannot satisfy the defined setting of 0.85
s.
3. The oscillation settling time means the time required for the oscillation to settle after VDD is applied or after
the STOP mode is released.
4. When the supply voltage is 1.8 V
≤ VDD < 2.7 V and the X1 input frequency is 4.19 MHz < fx ≤ 6.0 MHz,
set the PCC to a value other than 0011. When the PCC is set to 0011, the time for one machine cycle cannot
satisfy the defined setting of 0.95
s.
Caution When the main system clock oscillator is used, conform to the following guidelines when wiring
at the portions surrounded by dotted lines in the figures above to eliminate the influence of the
wiring capacity.
The wiring must be as short as possible.
Other signal lines must not run in these areas.
Any line carrying a high fluctuating current must be kept away as far as possible.
The grounding point of the capacitor of the oscillator must have the same potential as that of VSS.
It must not be grounded to ground patterns carrying a large current.
No signal must be taken from the oscillator.
Typ.
Parameter
Oscillator frequency (fX)Note 1
Oscillation settling timeNote 3
Oscillator frequency (fX)Note 1
Oscillation settling timeNote 3
X1 input frequency (fX)Note 1
X1 input high/low level width
(tXH, tXL)
Min.
1.0
83.3
Max.
6.0Note 2
4
6.0Note 2
10
30
6.0Note 4
500
Unit
MHz
ms
MHz
ms
MHz
ns
Conditions
VDD = 2.2 to 5.5 V
After VDD reaches
Min. of the oscillation
voltage range
VDD = 2.2 to 5.5 V
VDD = 4.5 to 5.5 V
VDD = 2.2 to 5.5 V
VDD = 1.8 to 5.5 V
X1
X2
C1
C2
X1
X2
C1
C2
X1
X2
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