参数资料
型号: UPD78F9202MA-CAC-A
厂商: Renesas Electronics America
文件页数: 135/158页
文件大小: 0K
描述: MCU 8BIT 4KB FLASH 128B RAM
标准包装: 400
系列: 78K0S/Kx1+
核心处理器: 78K0S
芯体尺寸: 8-位
速度: 10MHz
外围设备: LVD,POR,PWM,WDT
输入/输出数: 7
程序存储器容量: 4KB(4K x 8)
程序存储器类型: 闪存
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 5.5 V
数据转换器: A/D 4x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 10-LSSOP(0.225",5.72mm 宽)
包装: 托盘
CHAPTER 5 CLOCK GENERATORS
User’s Manual U18172EJ3V0UD
76
5.3
Registers Controlling Clock Generators
The clock generators are controlled by the following four registers.
Processor clock control register (PCC)
Preprocessor clock control register (PPCC)
Low-speed internal oscillation mode register (LSRCM)
Oscillation stabilization time select register (OSTS) (
μPD78F920x only)
(1) Processor clock control register (PCC) and preprocessor clock control register (PPCC)
These registers are used to specify the division ratio of the system clock.
PCC and PPCC are set by using a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets PCC and PPCC to 02H.
Figure 5-2. Format of Processor Clock Control Register (PCC)
Address: FFFBH, After reset: 02H, R/W
Symbol
7
6
5
4
3
2
1
0
PCC
0
PCC1
0
Figure 5-3. Format of Preprocessor Clock Control Register (PPCC)
Address: FFF3H, After reset: 02H, R/W
Symbol
7
6
5
4
3
2
1
0
PPCC
0
PPCC1
PPCC0
PPCC1
PPCC0
PCC1
Selection of CPU clock (fCPU)
Note 1
0
fX
0
1
0
fX/2
Note 2
0
1
fX/2
2
1
0
fX/2
2 Note 3
0
1
fX/2
3 Note 2
1
0
1
fX/2
4 Note 3
Other than above
Setting prohibited
Notes 1. The setting range of the CPU clock differs depending on the supply voltage to be used.
Be sure to refer to CPU clock and peripheral clock frequencies described in AC
Characteristics in CHAPTER 19.
2.
If PPCC = 01H, the clock (fXP) supplied to the peripheral hardware is fX/2.
3.
If PPCC = 02H, the clock (fXP) supplied to the peripheral hardware is fX/2
2.
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