参数资料
型号: UPD78F9202MA-CAC-A
厂商: Renesas Electronics America
文件页数: 26/158页
文件大小: 0K
描述: MCU 8BIT 4KB FLASH 128B RAM
标准包装: 400
系列: 78K0S/Kx1+
核心处理器: 78K0S
芯体尺寸: 8-位
速度: 10MHz
外围设备: LVD,POR,PWM,WDT
输入/输出数: 7
程序存储器容量: 4KB(4K x 8)
程序存储器类型: 闪存
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 5.5 V
数据转换器: A/D 4x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 10-LSSOP(0.225",5.72mm 宽)
包装: 托盘
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00 (
μPD78F920x ONLY)
User’s Manual U18172EJ3V0UD
119
6.4.6
One-shot pulse output operation
16-bit timer/event counter 00 can output a one-shot pulse in synchronization with a software trigger or an external
trigger (TI000 pin input).
Setting
The basic operation setting procedure is as follows.
<1>
Set the count clock by using the PRM00 register.
<2>
Set the CRC00 register (see Figures 6-33 and 6-35 for the set value).
<3>
Set the TOC00 register (see Figures 6-33 and 6-35 for the set value).
<4>
Set any value to the CR000 and CR010 registers (0000H cannot be set).
<5>
Set the TMC00 register to start the operation (see Figures 6-33 and 6-35 for the set value).
Remarks 1. For the setting of the TO00 pin, see 6.3 (5) Port mode register 2 (PM2) and port mode control
register 2 (PMC2).
2. For how to enable the INTTM000 (if necessary, INTTM010) interrupt, see CHAPTER 10
INTERRUPT FUNCTIONS.
(1) One-shot pulse output with software trigger
A one-shot pulse can be output from the TO00 pin by setting 16-bit timer mode control register 00 (TMC00),
capture/compare control register 00 (CRC00), and 16-bit timer output control register 00 (TOC00) as shown in
Figure 6-33, and by setting bit 6 (OSPT00) of the TOC00 register to 1 by software.
By setting the OSPT00 bit to 1, 16-bit timer/event counter 00 is cleared and started, and its output becomes
active at the count value (N) set in advance to 16-bit timer capture/compare register 010 (CR010). After that,
the output becomes inactive at the count value (M) set in advance to 16-bit timer capture/compare register 000
(CR000)
Note.
Even after the one-shot pulse has been output, the TM00 register continues its operation. To stop the TM00
register, the TMC003 and TMC002 bits of the TMC00 register must be cleared to 00.
Note The case where N < M is described here. When N > M, the output becomes active with the CR000
register and inactive with the CR010 register. Do not set N to M.
Cautions 1. Do not set the OSPT00 bit to 1 again while the one-shot pulse is being output. To output the
one-shot pulse again, wait until the current one-shot pulse output is completed.
2. When using the one-shot pulse output of 16-bit timer/event counter 00 with a software
trigger, do not change the level of the TI000 pin or its alternate-function port pin.
Because the external trigger is valid even in this case, the timer is cleared and started even
at the level of the TI000 pin or its alternate-function port pin, resulting in the output of a
pulse at an undesired timing.
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