- 您现在的位置：买卖IC网 > PDF目录361590 > UPSD3213B-24U1T (意法半导体) Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM PDF资料下载
参数资料
| 型号： | UPSD3213B-24U1T |
| 厂商： | 意法半导体 |
| 英文描述： | Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM |
| 中文描述： | 闪存可编程系统设备与8032微控制器核心和64Kbit SRAM的 |
| 文件页数： | 54/176页 |
| 文件大小： | 1081K |
| 代理商： | UPSD3213B-24U1T |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页当前第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页第151页第152页第153页第154页第155页第156页第157页第158页第159页第160页第161页第162页第163页第164页第165页第166页第167页第168页第169页第170页第171页第172页第173页第174页第175页第176页
μ
PSD323X
54/176
Mode 0.
Putting either Timer into Mode 0 makes
it looklike an8048 Timer, which is an 8-bitCounter
with a divide-by-32 prescaler. Figure 22 showsthe
Mode 0 operation as it applies to Timer1.
In this mode, the Timer register is configured as a
13-bit register. As the count rolls over from all ’1s’
to all ’0s,’ it sets the Timer interrupt flag TF1. The
counted input is enabled to the Timer when TR1 =
1 and eitherGATE = 0 or /INT1 = 1. (Setting GATE
= 1allows the Timer to becontrolled byexternal in-
put /INT1,to facilitate pulse width measurements).
TR1 is a control bit in the Special Function Regis-
ter TCON (TCON Control Register). GATE is in
TMOD.
The 13-bit register consists of all 8 bits of TH1 and
the lower 5 bits of TL1. The upper 3 bits of TL1 are
indeterminate and should be ignored. Setting the
run flag does not clear the registers.
Mode 0 operation is the same for the Timer0 as for
Timer1. Substitute TR0, TF0, and /INT0 for the
corresponding Timer1 signals in Figure 22. There
are two different GATE Bits, one for Timer1 and
one for Timer0.
Mode 1.
Mode 1 is the same as Mode 0, except
that the Timer register is being run with all 16 bits.
Table 38. TMOD Register (TMOD)
Table 39. Description of the TMOD Bits
7
6
5
4
3
2
1
0
Gate
C/T
M1
M0
Gate
C/T
M1
M0
Bit
Symbol
Timer
Function
7
Gate
Timer1
Gating control when set. Timer/Counter 1 is enabled only while INT1 pin is High and
TR1 control pin is set. When cleared, Timer 1 is enabled whenever TR1 control bit is set
6
C/T
Timer orCounter selector,cleared for timer operation (input from internal system clock);
set for counter operation (input from T1 input pin)
5
M1
(M1,M0)=(0,0): 13-bit Timer/Counter, TH1, with TL1 as 5-bit prescaler
(M1,M0)=(0,1): 16-bit Timer/Counter. TH1 and TL1 are cascaded. There is no prescaler.
(M1,M0)=(1,0): 8-bit auto-reload Timer/Counter. TH1 holds a value which is to be
reloaded into TL1 each time it overflows
(M1,M0)=(1,1): Timer/Counter 1 stopped
4
M0
3
Gate
Timer0
Gating control when set. Timer/Counter 0 is enabled only while INT0 pin is High and
TR0 control pin is set. When cleared, Timer 0 is enabled whenever TR0 control bit is set
2
C/T
Timer orCounter selector,cleared for timer operation (input from internal system clock);
set for counter operation (input from T0 input pin)
1
M1
(M1,M0)=(0,0): 13-bit Timer/Counter, TH0, with TL0 as 5-bit prescaler
(M1,M0)=(0,1): 16-bit Timer/Counter. TH0 and TL0 are cascaded. There is no prescaler.
(M1,M0)=(1,0): 8-bit auto-reload Timer/Counter. TH0 holds a value which is to be
reloaded into TL0 each time it overflows
(M1,M0)=(1,1): TL0 is an 8-bit Timer/Counter controlled by the standard TImer 0control
bits. TH0 is an 8-bit timer only controlled by Timer 1 control bits
0
M0
相关PDF资料 |
PDF描述 |
|---|---|
| UPSD3213B-40T1T | Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM |
| UPSD3213B-40T6T | Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM |
| UPSD3213B-40U1T | Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM |
| UPSD3213BV-40U6T | Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM |
| UPSD3214A-40U1T | Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| UPSD3213B-24U6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
| UPSD3213B-24U6T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM |
| UPSD3213B-40T1 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
| UPSD3213B-40T1T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM |
| UPSD3213B-40T6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
发布紧急采购，3分钟左右您将得到回复。