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参数资料
| 型号： | V58C2256324SAH-36 |
| 厂商： | PROMOS TECHNOLOGIES INC |
| 元件分类： | DRAM |
| 英文描述： | 8M X 32 DDR DRAM, 0.55 ns, PBGA144 |
| 封装： | ROHS COMPLIANT, BGA-144 |
| 文件页数： | 5/37页 |
| 文件大小： | 370K |
| 代理商： | V58C2256324SAH-36 |
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V58C2256324SA Rev. 1.4 August 2007
ProMOS TECHNOLOGIES
V58C2256324SA
Self Refresh
The Self Refresh mode can be used to retain the data in the DDR SDRAM if the chip is powered down. To set the DDR SDRAM into a
Self
efreshing mode, a Self Refresh command must be issued and CKE held low at the rising edge of the clock. Once the Self Refresh
command is initiated, CKE must stay low to keep the device in Self Refresh mode. During the Self Refresh mode, all of the external control
signals are disabled except CKE. The clock is internally disabled during Self Refresh operation to reduce power. An internal timing
generator guarantees the self refreshing of the memory content. To exit the Self Refresh mode, a stable external clock is needed for the
DLL before returning CKE high. After the Power Down Exit time(t PDEX), a Deselect or NOP command is issued and CKE is held high
for longer than t SREX in order to lock the DLL.
Self Refresh timing
Clk
Command
NOP
t
SREX
CKE
SELF
REFRESH
NOP
DESEL
NOP
DESEL
NOP
DESEL
NOP
DESEL
Any
Comm.
R
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