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参数资料
| 型号： | V58C2256324SAH-36 |
| 厂商： | PROMOS TECHNOLOGIES INC |
| 元件分类： | DRAM |
| 英文描述： | 8M X 32 DDR DRAM, 0.55 ns, PBGA144 |
| 封装： | ROHS COMPLIANT, BGA-144 |
| 文件页数： | 7/37页 |
| 文件大小： | 370K |
| 代理商： | V58C2256324SAH-36 |
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V58C2256324SA Rev. 1.4 August 2007
ProMOS TECHNOLOGIES
V58C2256324SA
Burst Mode Operation
Burst mode operation is used to provide a constant flow of data to the memory (write cycle) or from the memory (read cycle). The burst
length is programmable and set by address bits A0 - A3 during the Mode Register Setup command. The burst length controls the number
of words that will be output after a read command or the number of words to be input after a write command. One word is 32 bits wide.
The sequential burst length can be set to 2, 4 or 8 data words.
Burst Mode and Sequence
Note: standar d interleaved burst mode also available but not spec ified here
Burst Length
Starting Column Address
Order of Access within a Burst
A2
A1
A0
Type = Sequential
2
0
1
4
0
0 - 1 - 2 - 3
0
1
1 - 2 - 3 - 0
1
0
2 - 3 - 0 - 1
1
3 - 0 - 1 - 2
8
0
0 - 1 - 2 - 3 - 4 - 5 - 6 - 7
0
1
1 - 2 - 3 - 4 - 5 - 6 - 7 - 0
0
1
0
2 - 3 - 4 - 5 - 6 - 7 - 0 - 1
0
1
3 - 4 - 5 - 6 - 7 - 0 - 1 - 2
1
0
4 - 5 - 6 - 7 - 0 - 1 - 2 - 3
1
0
1
5 - 6 - 7 - 0 - 1 - 2 - 3 - 4
1
0
6 - 7 - 0 - 1 - 2 - 3 - 4 - 5
1
7 - 0 - 1 - 2 - 3 - 4 - 5 - 6
0 - 1
1 - 0
Burst Length and Sequence
Burst Length
Starting Length (A2, A1, A0)
Sequential Mode
Interleave Mode
2
xx0
0, 1
xx1
1, 0
4
x00
0, 1, 2, 3
x01
1, 2, 3, 0
1, 0, 3, 2
x10
2, 3, 0, 1
x11
3, 0, 1, 2
3, 2, 1, 0
8
000
0,1, 2, 3, 4, 5, 6, 7
001
1, 2, 3, 4, 5, 6, 7, 0
1, 0, 3, 2, 5, 4, 7, 6
010
2, 3, 4, 5, 6, 7, 0, 1
2, 3, 0, 1, 6, 7, 4, 5
011
3, 4, 5, 6, 7, 0, 1, 2
3, 2, 1, 0, 7, 6, 5, 4
100
4, 5, 6, 7, 0, 1, 2, 3
101
5, 6, 7, 0, 1, 2, 3, 4
5, 4, 7, 6, 1, 0, 3, 2
110
6, 7, 0, 1, 2, 3, 4, 5
6, 7, 4, 5, 2, 3, 0, 1
111
7, 0, 1, 2, 3, 4, 5, 6
7, 6, 5, 4, 3, 2, 1, 0
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