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参数资料
| 型号： | W224BX |
| 英文描述： | CPU SYSTEM CLOCK GENERATOR|TSSOP|56PIN|PLASTIC |
| 中文描述： | CPU系统时钟发生器|采用TSSOP | 56PIN |塑料 |
| 文件页数： | 7/17页 |
| 文件大小： | 349K |
| 代理商： | W224BX |
W224B
7
Spread Spectrum Frequency Timing
Generation
The device generates a clock that is frequency modulated in
order to increase the bandwidth that it occupies. By increasing
the bandwidth of the fundamental and its harmonics, the am-
plitudes of the radiated electromagnetic emissions are re-
duced. This effect is depicted in
Figure 6
.
As shown in
Figure 6
, a harmonic of a modulated clock has a
much lower amplitude than that of an unmodulated signal. The
reduction in amplitude is dependent on the harmonic number
and the frequency deviation or spread. The equation for the
reduction is:
dB = 6.5 + 9*log
10
(P) + 9*log
10
(F)
Where
P
is the percentage of deviation and
F
is the frequency
in MHz where the reduction is measured.
The output clock is modulated with a waveform depicted in
Figure 7
. This waveform, as discussed in “Spread Spectrum
Clock Generation for the Reduction of Radiated Emissions” by
Bush, Fessler, and Hardin, produces the maximum reduction
in the amplitude of radiated electromagnetic emissions. The
deviation selected for this chip is –0.5% or –1.0% of the select-
ed frequency.
Figure 7
details the Cypress spreading pattern.
Cypress does offer options with more spread and greater EMI
reduction. Contact your local Sales representative for details
on these devices.
Spread Spectrum clocking is activated or deactivated by se-
lecting the appropriate value for bit 3 in data byte 0 of the SM-
Bus data stream. Refer to page 9 for more details.
Figure 6. Clock Harmonic with and without SSCG Modulation Frequency Domain Representation
Spread
Spectrum
Enabled
EMI Reduction
Non-
Spectrum
MAX.
MIN.
1
2
3
4
5
6
7
8
9
1
1
2
3
4
5
6
7
8
9
1
F
Figure 7. Typical Modulation Profile
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