W224B
8
Serial Data Interface
The W224 features a two-pin, serial data interface that can be
used to configure internal register settings that control partic-
ular device functions.
Data Protocol
The clock driver serial protocol accepts only block writes from
the controller. The bytes must be accessed in sequential order
from lowest to highest byte with the ability to stop after any
complete byte has been transferred. Indexed bytes are not al-
lowed.
A block write begins with a slave address and a write condition.
After the command code the core logic issues a byte count
which describes how many more bytes will follow in the mes-
sage. If the host had 20 bytes to send, the first byte would be
the number 20 (14h), followed by the 20 bytes of data. The byte
count may not be 0. A block write command is allowed to trans-
fer a maximum of 32 data bytes. The slave receiver address
for W224 is 11010010.
Figure 8
shows an example of a block
write.
The command code and the byte count bytes are required as
the first two bytes of any transfer. W224 expects a command
code of 0000 0000. The byte count byte is the number of ad-
ditional bytes required for the transfer, not counting the com-
mand code and byte count bytes. Additionally, the byte count
byte is required to be a minimum of 1 byte and a maximum of
32 bytes to satisfy the above requirement.
Table 8
shows an
example of a possible byte count value.
A transfer is considered valid after the acknowledge bit corre-
sponding to the byte count is read by the controller.
Note:
11. The acknowledgment bit is returned by the slave/receiver (W224).
1 bit
7 bits
1
1
8 bits
1
Start bit
Slave Address
R/W
Ack
Command Code
Ack
Byte Count = N
Ack
Data Byte 1
Ack
Data Byte 2
Ack
...
Data Byte N
Ack
Stop
1 bit
8 bits
1
8 bits
1
8 bits
1
1
Figure 8. An Example of a Block Write
[11]
Table 8. Example of Possible Byte Count Value
Byte Count Byte
MSB
0000
0000
0000
0000
0000
0000
0000
0000
0010
Notes
LSB
0000
0001
0010
0011
0100
0101
0110
0111
0000
Not allowed. Must have at least one byte.
Data for functional and frequency select register (currently byte 0 in spec)
Writes first two bytes of data (byte 0 then byte 1)
Writes first three bytes (byte 0, 1, 2 in order)
Writes first four bytes (byte 0, 1, 2, 3 in order)
Writes first five bytes (byte 0, 1, 2, 3, 4 in order)
Writes first six bytes (byte 0, 1, 2, 3, 4, 5 in order)
Writes first seven bytes (byte 0, 1, 2, 3, 4, 5, 6 in order)
Max. byte count supported = 32