W250-03
PRELIMINARY
Document #: 38-07254 Rev. *A
Page 10 of 12
REF Clock Outputs (Lump Capacitance Test Load = 20 pF)
Parameter
Description
f
Frequency, Actual
t
R
Output Rise Edge Rate
t
F
Output Fall Edge Rate
t
D
Duty Cycle
f
ST
Frequency Stabilization from
Power-up (cold start)
Test Condition/Comments
Frequency generated by crystal oscillator
Measured from 0.4V to 2.4V
Measured from 2.4V to 0.4V
Measured on rising and falling edge at 1.5V
Assumes full supply voltage reached within
1 ms from power-up. Short cycles exist prior to
frequency stabilization.
Average value during switching transition. Used
for determining series termination value.
Min.
Typ.
14.318
Max.
Unit
MHz
V/ns
V/ns
%
ms
0.5
0.5
45
2
2
55
3
Z
o
AC Output Impedance
40
48-MHz Clock Output (Lump Capacitance Test Load = 20 pF)
Parameter
Description
f
Frequency, Actual
f
D
Deviation from 48 MHz
m/n
PLL Ratio
t
R
Output Rise Edge Rate
t
F
Output Fall Edge Rate
t
D
Duty Cycle
f
ST
Frequency Stabilization
from Power-up (cold start)
Test Condition/Comments
Determined by PLL divider ratio (see m/n below)
(48.008
–
48)/48
(14.31818 MHz x 57/17 = 48.008 MHz)
Measured from 0.4V to 2.4V
Measured from 2.4V to 0.4V
Measured on rising and falling edge at 1.5V
Assumes full supply voltage reached within 1 ms
from power-up. Short cycles exist prior to fre-
quency stabilization.
Average value during switching transition. Used
for determining series termination value.
Min.
Typ.
48.008
+167
57/17
Max.
Unit
MHz
ppm
0.5
0.5
45
2
2
V/ns
V/ns
%
ms
55
3
Z
o
AC Output Impedance
40
24-MHz Clock Output (Lump Capacitance Test Load = 20 pF)
Parameter
Description
f
Frequency, Actual
f
D
Deviation from 24 MHz
m/n
PLL Ratio
t
R
Output Rise Edge Rate
t
F
Output Fall Edge Rate
t
D
Duty Cycle
f
ST
Frequency Stabilization
from Power-up (cold start)
Test Condition/Comments
Determined by PLL divider ratio (see m/n below)
(24.004
–
24)/24
(14.31818 MHz x 57/34 = 24.004 MHz)
Measured from 0.4V to 2.4V
Measured from 2.4V to 0.4V
Measured on rising and falling edge at 1.5V
Assumes full supply voltage reached within 1 ms
from power-up. Short cycles exist prior to fre-
quency stabilization.
Average value during switching transition. Used
for determining series termination value.
Min.
Typ.
24.004
+167
57/34
Max.
Unit
MHz
ppm
0.5
0.5
45
2
2
V/ns
V/ns
%
ms
55
3
Z
o
AC Output Impedance
40
Ordering Information
Ordering Code
W250-03
Package
Name
H
Package Type
48-pin SSOP (300 mils)