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参数资料
| 型号： | W250-03 |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 时钟和缓冲器 |
| 文件页数： | 8/12页 |
| 文件大小： | 120K |
| 代理商： | W250-03 |
W250-03
PRELIMINARY
Document #: 38-07254 Rev. *A
Page 8 of 12
AC Electrical Characteristics
T
A
= 0
°
C to +70
°
C, 3.3V, V
DD
= 3.3V±5%, 2.5V, V
DD
= 2.5V
±
5% f
XTL
= 14.31818 MHz
AC clock parameters are tested and guaranteed over stated operating conditions using the stated lump capacitive load at the
clock output; Spread Spectrum is disabled.
Notes:
5.
6.
X1 input threshold voltage (typical) is 3.3V/2.
The W250-03 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. Total load placed on crystal is
18 pF; this includes typical stray capacitance of short PCB traces to crystal.
X1 input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected).
7.
Crystal Oscillator
V
TH
C
LOAD
X1 Input Threshold Voltage
[5]
Load Capacitance, Imposed on
External Crystal
[6]
X1 Input Capacitance
[7]
Pin Capacitance/Inductance
C
IN
Input Pin Capacitance
C
OUT
Output Pin Capacitance
L
IN
Input Pin Inductance
V
DDQ3
= 3.3V
1.65
18
V
pF
C
IN,X1
Pin X2 unconnected
28
pF
Except X1 and X2
5
6
7
pF
pF
nH
CPU Clock Outputs (Lump Capacitance Test Load = 20 pF)
Parameter
t
P
Description
Period
Test Condition/
Comments
Measured on rising edge
at 1.25
Duration of clock cycle
above 2.0V
Duration of clock cycle be-
low 0.4V
Measured from 0.4V to
2.0V
Measured from 2.0V to
0.4V
Measured on rising and
falling edge at 1.25V
Measured on rising edge
at 1.25V. Maximum differ-
ence of cycle time be-
tween two adjacent cycles.
Measured on rising edge
at 1.25V
Assumes full supply volt-
age reached within 1 ms
from power-up. Short cy-
cles exist prior to frequen-
cy stabilization.
Average value during
switching transition. Used
for determining series ter-
mination value.
CPU = 66.6 MHz
Min.
Typ.
15
CPU = 100 MHz
Min.
Typ.
10
CPU = 133 MHz
Min.
Typ.
7.5
Unit
ns
Max.
15.5
Max.
10.5
Max.
8.0
t
H
High Time
5.2
3.0
1.87
ns
t
L
Low Time
5.0
2.8
1.67
ns
t
R
Output Rise
Edge Rate
Output Fall Edge
Rate
Duty Cycle
1
4
1
4
1
4
V/ns
t
F
1
4
1
4
1
4
V/ns
t
D
45
55
45
55
45
55
%
t
JC
Jitter,
Cycle-to-Cycle
250
250
250
ps
t
SK
Output Skew
175
175
175
ps
f
ST
Frequency
Stabilization
from Power-up
(cold start)
3
3
3
ms
Z
o
AC Output
Impedance
20
20
20
DC Electrical Characteristics:
T
A
= 0
°
C to +70
°
C, 3.3V, V
DD
= 3.3V±5%, 2.5V, V
DD
= 2.5V±5% (continued)
Parameter
Description
Test Condition
Min.
Typ.
Max.
Unit
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