参数资料
型号: W25Q64DWZPIG
厂商: Winbond Electronics
文件页数: 53/82页
文件大小: 0K
描述: IC FLASH SPI 64MBIT 8WSON
标准包装: 100
系列: SpiFlash®
格式 - 存储器: 闪存
存储器类型: FLASH
存储容量: 64M(8M x 8)
速度: 104MHz
接口: SPI 串行
电源电压: 1.7 V ~ 1.95 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-WDFN 裸露焊盘
供应商设备封装: 8-WSON(6x5)
包装: 管件
W25Q64DW
10.2.29 Release Power-down / Device ID (ABh)
The Release from Power-down / Device ID instruction is a multi-purpose instruction. It can be used to
release the device from the power-down state, or obtain the devices electronic identification (ID) number.
To release the device from the power-down state, the instruction is issued by driving the /CS pin low,
shifting the instruction code “ABh” and driving /CS high as shown in Figure 28a & 28b. Release from
power-down will take the time duration of t RES1 (See AC Characteristics) before the device will resume
normal operation and other instructions are accepted. The /CS pin must remain high during the t RES1 time
duration.
When used only to obtain the Device ID while not in the power-down state, the instruction is initiated by
driving the /CS pin low and shifting the instruction code “ABh” followed by 3-dummy bytes. The Device ID
bits are then shifted out on the falling edge of CLK with most significant bit (MSB) first as shown in figure
28. The Device ID values for the W25Q64DW is listed in Manufacturer and Device Identification table. The
Device ID can be read continuously. The instruction is completed by driving /CS high.
When used to release the device from the power-down state and obtain the Device ID, the instruction is
the same as previously described, and shown in Figure 28c & 28d, except that after /CS is driven high it
must remain high for a time duration of t RES2 (See AC Characteristics). After this time duration the device
will resume normal operation and other instructions will be accepted. If the Release from Power-down /
Device ID instruction is issued while an Erase, Program or Write cycle is in process (when BUSY equals
1) the instruction is ignored and will not have any effects on the current cycle.
/CS
tRES1
Mode 3
0
1
2
3
4
5
6
7
Mode 3
CLK
Mode 0
Mode 0
Instruction (ABh)
DI
(IO 0 )
Power-down current
Stand-by current
Figure 28a. Release Power-down Instruction (SPI Mode)
Publication Release Date: September 18, 2012
- 53 -
Revision D
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