
W39V040A
Publication Release Date: June 21, 2005
- 9 -
Revision A6
GPI Register
BIT
FUNCTION
7
5
Reserved
4
Read GPI4 pin status
3
Read GPI3 pin status
2
Read GPI2 pin status
1
Read GPI1 pin status
0
Read GPI0 pin status
Alternative GPI Register Memory Address Table
ID[2:0] PINS
MEMORY ADDRESS
000
FFB0E100, FFBC0100
001
FFB1E100, FFB40100
010
FFB2E100, FFAC0100
011
FFB3E100, FFA40100
100
FFB4E100, FF9C0100
101
FFB5E100, FF940100
110
FFB6E100, FF8C0100
111
FFB7E100, FF840100
6.12.2 Product Identification Registers
There is an alternative software method (six commands bytes) to read out the Product Identification in
both the Programmer interface mode and the LPC interface mode. Thus, the programming equipment
can automatically matches the device with its proper erase and programming algorithms.
In the software access mode, a six-byte (or JEDEC 3-byte) command sequence can be used to access
the product ID for programmer interface mode. A read from address 0000(hex) outputs the
manufacturer code, DA(hex). A read from address 0001(hex) outputs the device code, 3D(hex).” The
product ID operation can be terminated by a three-byte command sequence or an alternate one-byte
command sequence (see Command Definition table for detail).
6.13 Memory Address Map
There are 8M bytes space reserved for BIOS Addressing. The 8M bytes are mapped into a single 4M
system address by dividing the ROMs into two 4M byte pages. For accessing the 4M byte BIOS
storage space, the ID[2:0] pins are inverted in the ROM and are compared to address lines [21:19].
ID[3] can be used as like active low chip-select pin.
The 32Mbit address space is as below:
BLOCK
LOCK
ADDRESS RANGE
4M Byte BIOS ROM
None
FFFF, FFFFh: FFC0, 0000h