参数资料
型号: W9864G6JH-7
厂商: WINBOND ELECTRONICS CORP
元件分类: DRAM
英文描述: 4M X 16 SYNCHRONOUS DRAM, 5.5 ns, PDSO54
封装: 0.400 INCH, ROHS COMPLIANT, TSSOP2-54
文件页数: 12/43页
文件大小: 662K
代理商: W9864G6JH-7
W9864G6JH
Publication Release Date: Aug. 31, 2010
- 2 -
Revision A02
9.3
Capacitance.................................................................................................................. 13
9.4
DC Characteristics........................................................................................................ 14
9.5
AC Characteristics and Operating Condition................................................................ 15
10.
TIMING WAVEFORMS ............................................................................................................. 18
10.1
Command Input Timing ................................................................................................ 18
10.2
Read Timing.................................................................................................................. 19
10.3
Control Timing of Input/Output Data............................................................................. 20
10.4
Mode Register Set Cycle .............................................................................................. 21
11.
OPERATINOPERATING TIMING EXAMPLE........................................................................... 22
11.1
Interleaved Bank Read (Burst Length = 4, CAS Latency = 3)...................................... 22
11.2
Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Auto-precharge)........... 23
11.3
Interleaved Bank Read (Burst Length = 8, CAS Latency = 3)...................................... 24
11.4
Interleaved Bank Read (Burst Length = 8, CAS Latency = 3, Auto-precharge)........... 25
11.5
Interleaved Bank Write (Burst Length = 8) ................................................................... 26
11.6
Interleaved Bank Write (Burst Length = 8, Auto-precharge) ........................................ 27
11.7
Page Mode Read (Burst Length = 4, CAS Latency = 3) .............................................. 28
11.8
Page Mode Read/Write (Burst Length = 8, CAS Latency = 3)..................................... 29
11.9
Auto-precharge Read (Burst Length = 4, CAS Latency = 3)........................................ 30
11.10
Auto-precharge Write (Burst Length = 4) .................................................................... 31
11.11
Auto Refresh Cycle ..................................................................................................... 32
11.12
Self Refresh Cycle....................................................................................................... 33
11.13
Bust Read and Single Write (Burst Length = 4, CAS Latency = 3)............................. 34
11.14
Power down Mode....................................................................................................... 35
11.15
Auto-precharge Timing (Write Cycle).......................................................................... 36
11.16
Auto-precharge Timing (Read Cycle) ......................................................................... 37
11.17
Timing Chart of Read to Write Cycle........................................................................... 38
11.18
Timing Chart of Write to Read Cycle........................................................................... 38
11.19
Timing Chart of Burst Stop Cycle (Burst Stop Command).......................................... 39
11.20
Timing Chart of Burst Stop Cycle (Precharge Command).......................................... 39
11.21
CKE/DQM Input Timing (Write Cycle)......................................................................... 40
11.22
CKE/DQM Input Timing (Read Cycle)......................................................................... 41
12.
PACKAGE SPECIFICATION .................................................................................................... 42
12.1
54L TSOP (II)-400 mil................................................................................................... 42
13.
REVISION HISTORY ................................................................................................................43
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