参数资料
型号: WED2DL32512V40BI
元件分类: SRAM
英文描述: 512K X 32 MULTI DEVICE SRAM MODULE, 4 ns, PBGA119
封装: PLASTIC, BGA-119
文件页数: 6/9页
文件大小: 143K
代理商: WED2DL32512V40BI
6
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
WED2DL32512V
SNOOZE MODE
SNOOZE MODE is a low-current, “power-down” mode In which the
device is deselected and current is reduced to ISB2Z. The duration of
SNOOZE MODE is dictated by the length of time ZZ is in a HIGH state.
After the device enters SNOOZE MODE, all inputs except ZZ become
gated inputs and are ignored. ZZ is an asynchronous, active HIGH
Description
Conditions
Symbol
Min
Max
Units
Notes
Current during SNOOZE MODE
ZZ
≥ VIH
ISB2Z
10
mA
ZZ active to input ignored
tZZ
2(tKC)ns
1
ZZ inactive to input sampled
tRZZ
2(tKC)ns
1
ZZ active to snooze current
tZZI
2(tKC)ns
1
ZZ inactive to exit snooze current
tRZZI
ns
1
SNOOZE MODE
input that causes the device to enter SNOOZE MODE. When ZZ
becomes a logic HIGH, ISB2Z is guaranteed after the setup time tZZ is
met. Any READ or WRITE operation pending when the device enters
SNOOZE MODE is not guaranteed to complete successfully. There-
fore, SNOOZE MODE must not be initiated until valid pending
operations are completed.
FIG. 2 SNOOZE MODE TIMING DIAGRAM
ZZ
ISUPPLY
CLOCK
ALL INPUTS
(except ZZ)
Output (Q)
tZZ
tZZI
tRZZ
tRZZI
HIGH-Z
DESELECT or READ Only
IISB2Z
DON'T CARE
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