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| 型号： | WJLXT971ALC.A4-857344 |
| 厂商： | CORTINA SYSTEMS INC |
| 元件分类： | 网络接口 |
| 英文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| 封装： | 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, LQFP-64 |
| 文件页数： | 35/80页 |
| 文件大小： | 931K |
| 代理商： | WJLXT971ALC.A4-857344 |
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Page 40
Cortina Systems LXT972A Single-Port 10/100 Mbps PHY Transceiver
LXT972A PHY
Datasheet
249186, Revision 5.2
13 September 2007
5.7 100 Mbps Operation
5.7.3.2
Physical Medium Attachment Sublayer
5.7.3.2.1
Link
In 100 Mbps mode, link is established when the descrambler becomes locked and
remains locked for approximately 50 ms. Link remains up unless the descrambler
receives less than 16 consecutive idle symbols in any 2 ms period. This operation filters
out small noise hits that may disrupt the link.
For short periods, MLT-3 idle waveforms meet all criteria for 10BASE-T start delimiters. A
working 10BASE-T receive may temporarily indicate link to 100BASE-TX waveforms.
However, the PHY does not bring up a permanent 10 Mbps link.
The LXT972A PHY reports link failure through the MII status bits (register bits 1.2 and
17.10) and interrupt functions. Link failure causes the LXT972A PHY to re-negotiate if
auto-negotiation is enabled.
5.7.3.2.2
Link Failure Override
The LXT972A PHY normally transmits data packets only if it detects the link is up. Setting
register bit 16.14 = 1 overrides this function, allowing the LXT972A PHY to transmit data
packets even when the link is down. This feature is provided as a transmit diagnostic tool.
Note:
Auto-negotiation must be disabled to transmit data packets in the absence of link. If auto-
negotiation is enabled, the LXT972A PHY automatically transmits FLP bursts if the link is
down.
Caution:
During normal operation, Cortina does not recommend setting register bit 16.14 for
100 Mbps receive functions because receive errors may be generated.
INVALID
Undefined
H 4
0 0 1 0 0
Transmit Error. Used to force signaling
errors
Undefined
Invalid
0 0 0 0 0
Invalid
Undefined
Invalid
0 0 0 0 1
Invalid
Undefined
Invalid
0 0 0 1 0
Invalid
Undefined
Invalid
0 0 0 1 1
Invalid
Undefined
Invalid
0 0 1 0 1
Invalid
Undefined
Invalid
0 0 1 1 0
Invalid
Undefined
Invalid
0 1 0 0 0
Invalid
Undefined
Invalid
0 1 1 0 0
Invalid
Undefined
Invalid
1 0 0 0 0
Invalid
Undefined
Invalid
1 1 0 0 1
Invalid
Table 15
4B/5B Coding (Sheet 2 of 2)
Code Type
4B Code
3 2 1 0
Name
5B Code
4 3 2 1 0
Interpretation
1. The /I/ (Idle) code group is sent continuously between frames.
2. The /J/ and /K/ (SSD) code groups are always sent in pairs, and /K/ follows /J/.
3. The /T/ and /R/ (ESD) code groups are always sent in pairs, and /R/ follows /T/.
4. An /H/ (Error) code group is used to signal an error condition.
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| WJLXT971ALE.A4-857343 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| WJLXT971ALE.A4-857346 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| WJLXT972ALC.A4-857341 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
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