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| 型号： | WJLXT971ALC.A4-857344 |
| 厂商： | CORTINA SYSTEMS INC |
| 元件分类： | 网络接口 |
| 英文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| 封装： | 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, LQFP-64 |
| 文件页数： | 72/80页 |
| 文件大小： | 931K |
| 代理商： | WJLXT971ALC.A4-857344 |
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Page 74
Cortina Systems LXT972A Single-Port 10/100 Mbps PHY Transceiver
LXT972A PHY
Datasheet
249186, Revision 5.2
13 September 2007
9.0 Register Definitions -
Product-Specific Registers
Table 51
Interrupt Enable Register - Address 18, Hex 12
Bit
Name
Description
Type 1
Default
18.
15:9
Reserved
Write as ‘0’. Ignore on Read.
R/W
N/A
18.8
Reserved
Write as ‘0’. Ignore on Read.
R/W
0
18.7
ANMSK
Mask for Auto Negotiate Complete
0 = Do not allow event to cause interrupt.
1 = Enable event to cause interrupt.
R/W
0
18.6
SPEEDMSK
Mask for Speed Interrupt
0 = Do not allow event to cause interrupt.
1 = Enable event to cause interrupt.
R/W
0
18.5
DUPLEXMSK
Mask for Duplex Interrupt
0 = Do not allow event to cause interrupt.
1 = Enable event to cause interrupt.
R/W
0
18.4
LINKMSK
Mask for Link Status Interrupt
0 = Do not allow event to cause interrupt.
1 = Enable event to cause interrupt.
R/W
0
18.3
Reserved
Write as ‘0’. Ignore on Read.
R/W
0
18.2
Reserved
Write as ‘0’. Ignore on Read.
R/W
0
18.1
INTEN
Interrupt Enable.
0 = Disable interrupts.
1 = Enable interrupts.
R/W
0
18.0
TINT
Test Force Interrupt
0 = Normal operation.
1 = Force interrupt on MDINT_L
R/W
0
1. R/W = Read /Write
Table 52
Status Change Register - Address 19, Hex 13 (Sheet 1 of 2)
Bit
Name
Description
Type 1
Default
19.15:9
Reserved
Ignore on Read.
RO
N/A
19.8
Reserved
Ignore on Read.
RO
0
19.7
ANDONE
Auto-negotiation Status
0 = Auto-negotiation has not completed.
1 = Auto-negotiation has completed.
RO/
SC
N/A
19.6
SPEEDCHG
Speed Change Status
0 = A Speed Change has not occurred since last
reading this register.
1 = A Speed Change has occurred since last reading
this register.
RO/
SC
0
19.5
DUPLEXCHG
Duplex Change Status
0 = A Duplex Change has not occurred since last
reading this register.
1 = A Duplex Change has occurred since last
reading this register.
RO/
SC
0
1. R/W = Read/Write, RO = Read Only, SC = Self Clearing.
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| WJLXT971ALE.A4-857343 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| WJLXT971ALE.A4-857346 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
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