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参数资料
| 型号： | X1203S8T1 |
| 元件分类： | XO, clock |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO8 |
| 封装： | PLASTIC, SOIC-8 |
| 文件页数： | 19/19页 |
| 文件大小： | 155K |
| 代理商： | X1203S8T1 |
X1203
Characteristics subject to change without notice.
9 of 19
REV 1.2.0 2/13/01
www.xicor.com
Figure 6. Byte Write Sequence
Figure 7. Page Write Sequence
S
t
a
r
t
S
t
o
p
Slave
Address
CCR
Address 1
Data
A
C
K
A
C
K
SDA Bus
Signals from
the Slave
Signals from
the Master
0
CCR
Address 0
1
0
1
00000 000
A
C
K
A
C
K
CCR
Address 0
S
t
a
r
t
S
t
o
p
Slave
Address
CCR
Address 1
Data
(n)
A
C
K
A
C
K
A
C
K
SDA Bus
Signals from
the Slave
Signals from
the Master
0
Data
(1)
A
C
K
(1
≤ n ≤ 8)
1
0
1
000 0 0 0 0 0
After the receipt of each byte, the X1203 responds with
an acknowledge, and the address is internally incre-
mented by one. When the counter reaches the end of
the page, it “rolls over” and goes back to the rst
address on the same page. If the master supplies
more than 8 bytes of data, then the previously loaded
data is over written by the new data, one byte at a time.
The master terminates the data byte loading by issuing
a stop condition, which causes the device to begin the
non volatile write cycle. As with the byte write opera-
tion, all inputs are disabled until completion of the inter-
nal write cycle. Refer to Figure 7 for the address,
acknowledge, and data transfer sequence.
Stops and Write Modes
Stop conditions that terminate write operations must
be sent by the master after sending at least 1 full data
byte and it’s associated ACK signal. If a stop is issued
in the middle of a data byte, or before 1 full data byte +
ACK is sent, then the device will reset itself without
performing the write. The contents of the array will not
be affected.
Acknowledge Polling
The disabling of the inputs during non volatile write
cycles can be used to take advantage of the typical
5ms write cycle time. Once the stop condition is issued
to indicate the end of the master’s byte load operation,
the device initiates the internal non volatile write cycle.
Acknowledge polling can be initiated immediately. To
do this, the master issues a start condition followed by
the Slave Address Byte for a write or read operation. If
the device is still busy with the non volatile write cycle
then no ACK will be returned. If the device has com-
pleted the write operation, an ACK will be returned and
the host can then proceed with the read or write opera-
tion. Refer to the ow chart in Figure 8.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| X1203V8 | 制造商:Intersil Corporation 功能描述: |
| X-120-499 | 制造商:Brady Corporation 功能描述:VIAL SIDE/TOP COMBO-B499 .50X1X.375DIA |
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| X1205S8 | 功能描述:IC RTC/CALENDAR 2-WIRE 8-SOIC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 实时时钟 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- 类型:时钟/日历 特点:警报器，闰年，SRAM 存储容量:- 时间格式:HH:MM:SS（12/24 小时） 数据格式:YY-MM-DD-dd 接口:SPI 电源电压:2 V ~ 5.5 V 电压 - 电源，电池:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-WDFN 裸露焊盘 供应商设备封装:8-TDFN EP 包装:管件 |
| X1205S8I | 功能描述:IC RTC/CALENDAR 2-WIRE 8-SOIC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 实时时钟 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- 类型:时钟/日历 特点:警报器，闰年，SRAM 存储容量:- 时间格式:HH:MM:SS（12/24 小时） 数据格式:YY-MM-DD-dd 接口:SPI 电源电压:2 V ~ 5.5 V 电压 - 电源，电池:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-WDFN 裸露焊盘 供应商设备封装:8-TDFN EP 包装:管件 |
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