参数资料
型号: X40021V14I-CT1
厂商: Intersil
文件页数: 13/24页
文件大小: 0K
描述: IC VOLTAGE MONITOR DUAL 14-TSSOP
标准包装: 2,500
类型: 多压监控器
监视电压数目: 2
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 可调节/可选择
电压 - 阀值: 1.6V,2.9V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 14-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 14-TSSOP
包装: 带卷 (TR)
X40020, 40021
Read Operation
Prior to issuing the Slave Address Byte with the R/W bit
set to one, the master must first perform a “dummy” write
operation. The master issues the start condition and the
Slave Address Byte, receives an acknowledge, then
issues the Word Address Bytes. After acknowledging
receipts of the Word Address Bytes, the master immedi-
ately issues another start condition and the Slave
Address Byte with the R/W bit set to one. This is followed
by an acknowledge from the device and then by the eight
bit word. The master terminates the read operation by
not responding with an acknowledge and then issuing a
stop condition. See Figure 12 for the address, acknowl-
edge, and data transfer sequence.
SERIAL DEVICE ADDRESSING
Memory Address Map
CR, Control Register, CR7: CR0
Address: 1FF hex
FDR, Fault DetectionRegister, FDR7: FDR0
Address: 0FF hex
Figure 12. Read Sequence
Slave Address Byte
Following a start condition, the master must output a
Slave Address Byte. This byte consists of several parts:
– a device type identifier that is always “1011” when
accessing the control register and fault detection
register.
– two bits of “0”.
– one bit that becomes the MSB of the memory
address X 4 .
– last bit of the slave command byte is a R/W bit. The
R/W bit of the Slave Address Byte defines the oper-
ation to be performed. When the R/W bit is a one,
then a read operation is selected. A zero selects a
write operation. See Figure 13.
Signals from
the Master
SDA Bus
Signals from
the Slave
S
t
a
r
t
Slave
Address
1 01 1 0 0
0
A
C
K
Byte
Address
1 111 1 1 11
A
C
K
S
t
a
r
t
Slave
Address
1
A
C
K
Data
S
t
o
p
13
FN8112.1
May 17, 2006
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