参数资料
型号: X40239S16I-BT1
厂商: Intersil
文件页数: 29/36页
文件大小: 0K
描述: IC VOLTAGE MON TRPL EE 16-SOIC
标准包装: 1,000
类型: 多压监控器
监视电压数目: 3
输出: 开路漏极,开路漏极
复位: 高有效/低有效
复位超时: 可调节/可选择
电压 - 阀值: 1.75V,2.95V,4.45V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC
包装: 带卷 (TR)
X40231, X40233, X40235, X40237, X40239
D.C. OPERATING CHARACTERISTICS
Symbol
V CC
Parameter
Min
2.7
Typ
Max
5.5
Unit
V
Test Conditions / Notes
Requires V CC > V TRIP1 or chip will
not operate.
Current into V CC Pin (X4023x: Active)
I CC 1(1)
Read memory array (3)
0.4
mA
f SCL = 400KHz
Write nonvolatile memory V CC = 3.5V
1.5
I CC 2(2)
Current into V CC Pin (X4023x:Standby)
With 2-Wire bus activity (3)
No 2-Wire bus activity
V CC = 3.5V
50.0
50.0
μ A
V SDA = V CC
MR = VSS
WP = VSS or Open/Floating
V SCL = V CC (when no bus
activity else f SCL = 400kHz)
I LI
I LO
V TRIP1PR
V TRIPx PR
Input Leakage Current (SCL, SDA, MR)
Input Leakage Current (WP)
Output Leakage Current (SDA, RESET,
V2FAIL , V3FAIL )
V TRIP1 Programming Range
V TRIPx Programming Range (x = 2,3)
2.75
1.75
0.1
0.1
10
10
10
4.70
3.50
μ A
μ A
μ A
V
V
V IN(4) = GND to V CC .
V OUT(5) = GND to V CC .
X4023x is in Standby (2)
V TRIP1(6)
V TRIP2(6)
V TRIP3(6)
t RPDx
Pre - programmed V TRIP1 threshold
Pre - programmed V TRIP2 threshold
Pre - programmed V TRIP3 threshold
V CC , V2MON, V3MON to RESET,
V2FAIL , V3FAIL propagation
2.8
4.3
2.05
2.8
1.60
1.60
2.95
4.45
2.20
2.95
1.75
1.75
3.00
4.50
2.25
3.00
1.80
1.80
20
V
V
V
μ s
Factory shipped default option A
Factory shipped default option B
Factory shipped default option A
Factory shipped default option B
Factory shipped default option A
Factory shipped default option B
See (8)
delay (respectively)
I Vx
V2MON Input leakage current
V3MON Input leakage current
1
1
μ A
V SDA = V SCL = V CC
Others = GND or V CC
V IL(7)
V IH(7)
Input LOW Voltage (SCL, SDA, WP, MR)
Input HIGH Voltage (SCL,SDA, WP, MR)
-0.5
2.0
0.8
V CC
+0.5
V
V
V OLx
RESET, V2FAIL , V3FAIL , SDA Output
Low Voltage
0.4
V
I SINK = 2.0mA
Notes: 1. The device enters the Active state after any START, and remains active until: 9 clock cycles later if the Device Select Bits in the Slave
Address Byte are incorrect; 200nS after a STOP ending a read operation; or t WC after a STOP ending a write operation.
Notes: 2. The device goes into Standby: 200nS after any STOP, except those that initiate a high voltage write cycle; t WC after a STOP that initiates
a high voltage cycle; or 9 clock cycles after any START that is not followed by the correct Device Select Bits in the Slave Address Byte.
Notes: 3. Current through external pull up resistor not included.
Notes: 4. V IN = Voltage applied to input pin.
Notes: 5. V OUT = Voltage applied to output pin.
Notes: 6. See “ORDERING INFORMATION” on page 36.
Notes: 7. V IL Min. and V IH Max. are for reference only and are not tested
Notes: 8. Equivalent input circuit for V XMON
29
V XMON
V REF
+
FN8115.0
April 11, 2005
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