参数资料
| 型号： | X4325V8I-2.7 |
| 厂商： | Intersil |
| 文件页数： | 22/22页 |
| 文件大小： | 0K |
| 描述： | IC SUPERVISOR CPU 32K EE 8-TSSOP |
| 标准包装： | 200 |
| 类型： | 简单复位/加电复位 |
| 监视电压数目： | 1 |
| 复位： | 高有效 |
| 复位超时： | 最小为 100 ms |
| 电压 - 阀值： | 2.62V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 8-TSSOP |
| 包装： | 管件 |
X4323, X4325
Thin Shrink Small Outline Plastic Packages (TSSOP)
N
INDEX
AREA
E1
-B-
E
0.25(0.010) M
GAUGE
PLANE
B M
M8.173
8 LEAD THIN SHRINK NARROW BODY SMALL OUTLINE
PLASTIC PACKAGE
INCHES MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
1
2
-A-
3
0.05(0.002)
D
SEATING PLANE
A
0.25
0.010
L
A
A1
A2
b
c
-
0.002
0.031
0.0075
0.0035
0.047
0.006
0.051
0.0118
0.0079
-
0.05
0.80
0.19
0.09
1.20
0.15
1.05
0.30
0.20
-
-
-
9
-
e
b
0.10(0.004) M
-C-
C A M
B S
A1
α
0.10(0.004)
A2
c
D
E1
e
E
L
0.116 0.120
0.169 0.177
0.026 BSC
0.246 0.256
0.0177
0.0295
2.95 3.05
4.30 4.50
0.65 BSC
6.25 6.50
0.45
0.75
3
4
-
-
6
N
8
8
7
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AC, Issue E.
α
0 o
8 o
0 o
8 o
-
Rev. 1 12/00
2. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.15mm (0.006 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimen-
sion at maximum material condition. Minimum space between protru-
sion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact. (Angles in degrees)
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
22
FN8122.1
May 25, 2006
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