参数资料
型号: X4325V8I-2.7
厂商: Intersil
文件页数: 6/22页
文件大小: 0K
描述: IC SUPERVISOR CPU 32K EE 8-TSSOP
标准包装: 200
类型: 简单复位/加电复位
监视电压数目: 1
复位: 高有效
复位超时: 最小为 100 ms
电压 - 阀值: 2.62V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 8-TSSOP
包装: 管件
X4323, X4325
Setting the V TRIP Voltage
This procedure is used to set the V TRIP to a higher or
lower voltage value. It is necessary to reset the trip
point before setting the new value.
To set the new V TRIP voltage, start by setting the WEL
bit in the control register, then apply the desired V TRIP
threshold voltage to the V CC pin and the programming
voltage, V P , to the WP pin and 2-byte address and 1
byte of “00” data. The stop bit following a valid write
operation initiates the V TRIP programming sequence.
Bring WP LOW to complete the operation.
Resetting the V TRIP Voltage
This procedure is used to set the V TRIP to a “native”
voltage level. For example, if the current V TRIP is 4.4V
and the new V TRIP must be 4.0V, then the V TRIP must
be reset. When V TRIP is reset, the new V TRIP is some-
thing less than 1.7V. This procedure must be used to
set the voltage to a lower value.
To reset the new V TRIP voltage start by setting the
WEL bit in the control register, apply the desired V TRIP
threshold voltage to the V CC pin and the programming
voltage, V P , to the WP pin and 2-byte address and 1
byte of “00” data. The stop bit of a valid write operation
initiates the V TRIP programming sequence. Bring WP
LOW to complete the operation.
Figure 2. Reset V TRIP Level Sequence (V CC > 3V. WP = 12-15V, WEL bit set)
WP
V P = 12-15V
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
SCL
SDA
A0h
00h
03h
00h
Figure 3. Sample V TRIP Reset Circuit
V P
V TRIP
Adj.
RESET
4.7K
1
2
3
4
SOIC
X4323
8
7
6
5
Adjust
Run
SCL
μC
SDA
6
FN8122.1
May 25, 2006
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