
Platform Flash In-System Programmable Configuration PROMs
DS123 (v2.18) May 19, 2010
Product Specification
21
R
XCFxxP PROM as Configuration Master with Internal Oscillator as Clock Source
X-Ref Target - Figure 9
Symbol
Description
XCF08P, XCF16P,
XCF32P
Units
Min
Max
THCF
CF hold time to guarantee design revision selection is sampled
when VCCO = 3.3V or 2.5V(12)
300
CF hold time to guarantee design revision selection is sampled
when VCCO = 1.8V(12)
300
TCF
CF to data delay when VCCO = 3.3V or 2.5V
–
ns
CF to data delay when VCCO = 1.8V
–
ns
TOE
OE/RESET to data delay(6) when VCCO = 3.3V or 2.5V
–
25
ns
OE/RESET to data delay(6) when VCCO = 1.8V
–
25
ns
TCE
CE to data delay(5) when VCCO = 3.3V or 2.5V
–
25
ns
CE to data delay(5) when VCCO = 1.8V
–
25
ns
TEOH
Data hold from CE, OE/RESET, or CF when VCCO = 3.3V or 2.5V
5
–
ns
Data hold from CE, OE/RESET, or CF when VCCO = 1.8V
5
–
ns
TDF
CE or OE/RESET to data float delay(2) when VCCO = 3.3V or 2.5V
–
45
ns
CE or OE/RESET to data float delay(2) when VCCO = 1.8V
–
45
ns
TOECF
OE/RESET to CLKOUT float delay(2) when VCCO = 3.3V or 2.5V
–
ns
OE/RESET to CLKOUT float delay(2) when VCCO = 1.8V
–
ns
TCECF
CE to CLKOUT float delay(2) when VCCO = 3.3V or 2.5V
–
ns
CE to CLKOUT float delay(2) when VCCO = 1.8V
–
ns
THCE
CE hold time (guarantees counters are reset)(5) when VCCO = 3.3V or 2.5V
2000
–
ns
CE hold time (guarantees counters are reset)(5) when VCCO = 1.8V
2000
–
ns
THOE
OE/RESET hold time (guarantees counters are reset)(6) when VCCO = 3.3V or 2.5V
2000
–
ns
OE/RESET hold time (guarantees counters are reset)(6) when VCCO = 1.8V
2000
–
ns
CE
OE/RESET
CLKOUT
BUSY
(optional)
DATA
TCE
TOE
THCE
THOE
THB
TSB
TOEC
TCEC
TCOH
TCDD
ds123_26_110707
TEOH
TDF
Note: Typically, 8 CLKOUT cycles are output after CE rising edge, before CLKOUT
tristates, if OE/RESET remains high, and terminal count has not been reached.
CF
EN_EXT_SEL
REV_SEL[1:0]
TSXT
THXT
TSRV
THRV
TSXT
THXT
TSRV
THRV
TCF
TCFC
TCECF
TOECF
TDDC
THCF