参数资料
| 型号： | XCF32PFS48C |
| 厂商： | Xilinx Inc |
| 文件页数： | 26/35页 |
| 文件大小： | 0K |
| 描述： | IC PROM SRL 1.8V 32M 48CSBGA |
| 标准包装： | 108 |
| 可编程类型： | 系统内可编程 |
| 存储容量： | 32Mb |
| 电源电压： | 1.65 V ~ 2 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 48-BFBGA，CSPBGA |
| 供应商设备封装： | 48-CSP（8x9） |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页当前第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页
Platform Flash In-System Programmable Configuration PROMs
DS123 (v2.18) May 19, 2010
Product Specification
32
R
Revision History
The following table shows the revision history for this document.
Date
Version
Revision
04/29/03
1.0
Xilinx Initial Release.
06/03/03
1.1
Made edits to all pages.
11/05/03
2.0
Major revision.
11/18/03
2.1
Pinout corrections as follows:
For VO48 package, removed 38 from VCCINT and added it to VCCO.
For FS48 package, removed pin D6 from VCCINT and added it to VCCO.
Table 14 (FS48 package):
For pin D6, changed name from VCCINT to VCCO.
For pin A4, changed name from GND to DNC.
Figure 8 (VO48 package): For pin 38, changed name from VCCINT to VCCO.
12/15/03
2.2
Added specification (4.7k
Ω) for recommended pull-up resistor on OE/RESET pin to section
Added paragraph to section "Standby Mode," page 12, concerning use of a pull-up resistor
and/or buffer on the DONE pin.
05/07/04
2.3
Section "Features," page 1: Added package styles and 33 MHz configuration speed limit to
itemized features.
Section "Description," page 1 and following: Added state conditions for CF and BUSY to the
descriptive text.
Table 2, page 3: Updated Virtex-II configuration bitstream sizes.
Section "Design Revisioning," page 8: Rewritten.
Section "Initiating FPGA Configuration," page 10 and following, five instances: Added instruction
to tie CF High if it is not tied to the FPGA’s PROG_B (PROGRAM) input.
Figure 6, page 16, through Figure 13, page 23: Added footnote indicating the directionality of the
CF pin in each configuration.
Section "I/O Input Voltage Tolerance and Power Sequencing," page 11: Rewritten.
Table 12, page 25: Added CF column to truth table, and added an additional row to document
the Low state of CF.
Revised footnote callout number on TOER from Footnote (4) to Footnote (3).
Added Footnote (2) callout to TVCC.
Added Typical (Typ) parameter columns and parameters for VCCINT and VCCO/VCCJ.
Added 1.5V operation parameter row to VIL and VIH, ’P’ devices.
Revised VIH Min, 2.5V operation, from 2.0V to 1.7V.
Added parameter row TIN and Max parameters
(Continued on next page)
Added parameter row and parameters for parallel configuration mode, ’P’ devices, to ICCO.
Added Footnote (1) and Footnote (2) with callouts in the Test Conditions column for ICCJ,
ICCINTS, ICCOS, and ICCJS, to define active and standby mode requirements.
Corrected description for second TCAC parameter line to show parameters for 1.8V VCCO.
Revised Footnote (7) to indicate VCCO = 3.3V.
Applied Footnote (7) to second TCYC parameter line.
Footnote (5)TCYC Min and TCAC Min formulas.
Table 14, page 39:
Added additional state conditions to CLK description.
Added function of resetting the internal address counter to CF description.
相关PDF资料 |
PDF描述 |
|---|---|
| XCR3256XL-7CS280C | IC CPLD 256MCELL 3.3V HP 280CSP |
| XCS10-3VQG100C | IC FPGA 5V C-TEMP 100-VQFP |
| XCV600E-8HQ240C | IC FPGA 1.8V C-TEMP 240-HQFP |
| XCV812E-8FG900C | IC FPGA 1.8V C-TEMP 900-FBGA |
| XE8801AMI000WP | SENSING MACHINE WITH 16 + 10 BIT |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XCF32PFS48C0936 | 制造商:Xilinx 功能描述:XLXXCF32PFS48C0936 |
| XCF32PFS48CES | 制造商:Xilinx 功能描述: |
| XCF32PFS48CESB | 制造商:Xilinx 功能描述: |
| XCF32PFSG48C | 功能描述:IC PROM SRL 1.8V 32M 48CSBGA RoHS:是 类别:集成电路 (IC) >> 存储器 - 用于 FPGA 的配置 Proms 系列:- 产品变化通告:Product Discontinuation 28/Jul/2010 标准包装:98 系列:- 可编程类型:OTP 存储容量:300kb 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-TSOP 包装:管件 |
| XCF32PFSG48C4039 | 制造商:Xilinx 功能描述: |
发布紧急采购，3分钟左右您将得到回复。