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参数资料
型号： XE8801AMI000WP
厂商： Semtech
文件页数： 29/135页
文件大小： 0K
描述： SENSING MACHINE WITH 16 + 10 BIT
标准包装： 558
系列： XE880x
应用： 感测机
核心处理器： Coolrisc816?
程序存储器类型： 闪存（22 kB）
控制器系列： XE8000
RAM 容量： 512 x 8
接口： UART，USRT
输入/输出数： 24
电源电压： 2.4 V ~ 5.5 V
工作温度： -40°C ~ 85°C
安装类型： 表面贴装
封装/外壳： 模具
包装： 托盘
配用： XE8000MP-ND - PROG BOARD AND PROSTART2 CARD
其它名称： Q2722595
Semtech 2005
www.semtech.com
18-6
XE8801A – SX8801R
The CkRc clock is the RC oscillator. The clocks below 32kHz can be derived from the RC oscillator or the crystal
oscillator (see the documentation of the clock block). A separate external clock source can be delivered on Port A
for each individual counter.
The external clock sources can be debounced or not by setting the Port A configuration registers.
The clock source can be changed only when the counter is stopped.
18.8 Counter mode selection
Each counter can work in one of the following modes:
1) Counter, downcount & upcount
2) Captured counter, downcount & upcount (only counters A&B)
3) PWM, downcount
The counters A and B or C and D can be cascaded or not. In cascaded mode, A and C are the LSB counters while
B and D are the MSB counters.
Table 18-11 shows the different operation modes of the counters A and B as a function of the mode control bits.
For all counter modes, the source of the down or upcount selection is given (either the bit CntADownUp or the bit
CntBDownUp). Also, the mapping of the interrupt sources IrqA and IrqB and the PWM output on PB(0) in these
different modes is shown.
CascadeAB
CountPWM0
CapFunc(1:0)
Counter A
mode
Counter B
mode
IrqA
source
IrqB
source
PB(0)
function
0
00
Counter 8b
Downup: A
Counter 8b
Downup: B
Counter
A
Counter
B
PB(0)
1
0
00
Counter 16b AB
Downup: A
Counter
AB
-
PB(0)
0
1
00
PWM 8b
Down
Counter 8b
Down
-
Counter
B
PWM A
1
00
PWM 10 – 16b AB
Down
-
PWM AB
0
1x
or
x1
Captured
counter 8b
Downup: A
Captured
counter 8b
Downup: B
Capture
A
Capture
B
PB(0)
1
0
1x
or
x1
Captured counter 16b AB
Downup: A
Capture
AB
Capture
AB
PB(0)
0
1
1x
or
x1
PWM 8b
Down
Captured
counter 8b
Downup: B
Must not
be used
Capture
B
PWM A
Table 18-11: Operating modes of the counters A and B
Table 18-12 shows the different operation modes of the counters C and D as a function of the mode control bits.
For all counter modes, the source of the down or upcount selection is given (either the bit CntCDownUp or the bit
CntDDownUp). The mapping of the interrupt sources IrqC and IrqD and the PWM output on PB(1) in these
different modes is also shown.
The switching between different modes must be done while the concerned counters are stopped. While switching
capture mode on and off, unwanted interrupts can appear on the interrupt channels concerned by this mode
change.
Not
Recommended
for
New
Designs
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