参数资料
型号: XE8801AMI000WP
厂商: Semtech
文件页数: 32/135页
文件大小: 0K
描述: SENSING MACHINE WITH 16 + 10 BIT
标准包装: 558
系列: XE880x
应用: 感测机
核心处理器: Coolrisc816?
程序存储器类型: 闪存(22 kB)
控制器系列: XE8000
RAM 容量: 512 x 8
接口: UART,USRT
输入/输出数: 24
电源电压: 2.4 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 模具
包装: 托盘
配用: XE8000MP-ND - PROG BOARD AND PROSTART2 CARD
其它名称: Q2722595
Semtech 2005
www.semtech.com
18-9
XE8801A – SX8801R
counters A and B or C and D respectively when they are in cascaded mode. The different possible resolutions in
cascaded mode are shown in Table 18-13. Choosing a 16 bit PWM code higher than the maximum value that can
be represented by the number of bits chosen for the resolution, results in a PWM output which is always tied to 1.
PwmXsize(1:0)
Resolution
11
16 bits
10
14 bits
01
12 bits
00
10 bits
Table 18-13: Resolution selection in cascaded PWM mode
Small PWM code
Large PWM code
Tper
Thlarge
Tllarge
Thsmall
Tlsmall
Figure 18-3: PWM modulation examples
The period of the PWM signal is given by the formula:
ckcnt
resolution
f
Tper
2
=
The duty cycle ratio DCR of the PWM signal is defined as:
Tper
Th
DCR
=
DCR can be selected between 0 % and
100
*
2
1
2
resolution
%.
DCR in % in function of the RegCntX content(s) is given by the relation:
resolution
DCR
2
RegCntX
*
100
=
18.11 Capture function
The 16-bit capture register is provided to facilitate frequency measurements. It provides a safe reading mechanism
for the counters A and B when they are running. When the capture function is active, the processor does not read
anymore the counters A and B directly, but instead reads shadow registers located in the capture block. An
interrupt is generated after a capture condition has been met when the shadow register content is updated. The
capture condition is user defined by selecting either internal capture signal sources derived from the prescaler or
from the external PA(2) or PA(3) ports. Both counters use the same capture condition.
Not
Recommended
for
New
Designs
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