参数资料
型号: XE8801AMI000WP
厂商: Semtech
文件页数: 54/135页
文件大小: 0K
描述: SENSING MACHINE WITH 16 + 10 BIT
标准包装: 558
系列: XE880x
应用: 感测机
核心处理器: Coolrisc816?
程序存储器类型: 闪存(22 kB)
控制器系列: XE8000
RAM 容量: 512 x 8
接口: UART,USRT
输入/输出数: 24
电源电压: 2.4 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 模具
包装: 托盘
配用: XE8000MP-ND - PROG BOARD AND PROSTART2 CARD
其它名称: Q2722595
Semtech 2005
www.semtech.com
4-2
XE8801A – SX8801R
4.1
Memory organisation
The XE8801AM-SX8801R CPUs are built with Harvard architecture. Harvard architecture uses separate instruction
and data memories. The instruction bus and data bus are also separated. The advantage of such a structure is that
the CPU can get a new instruction and read/write data simultaneously. The circuit configuration is shown in Figure
4-1. The CPU has its 16 internal registers. The instruction memory has a capacity of 8192 22-bit instructions. The
data memory space has 8 low power registers, the peripheral register space and 512 bytes of RAM.
Figure 4-1. Memory mapping
The CPU internal registers are described in the CPU chapter. A short reference of the low power registers and
peripheral registers is given in 4.2.
4.2
Quick reference data memory register map
The data register map is given in the tables below. A more detailed description of the different registers is given in
the detailed description of the different peripherals.
The tables give the following information:
1.
The register name and register address
2.
The different bits in the register
3.
The access mode of the different bits (see Table 4-4-1 for code description)
4.
The reset source and reset value of the different bits
The reset source coding is given in Table 4-4-2. To get a full description of the reset sources, please refer to the
reset block chapter.
F F
0h027F
RAM
capacity:
512 bytes
0h0080
0h1FFF
Instruction
memory
capacity:
8k x 22bit
0h0000
CPU
C
P
U
int
ernal
re
g
is
te
rs
a
stat
iph
ipl
i3h
i3l
i2h
i2l
i1h
i1l
i0h
i0l
r3
r2
r1
r0
Low power
RAM
0h0000
0h007F
Peripheral
registers
0h0008
Da
ta
mem
o
ry
dat
abus
in
st
ru
ct
io
n
b
u
s
Not
Recommended
for
New
Designs
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