参数资料
型号: XR17C158CV-F
厂商: Exar Corporation
文件页数: 50/67页
文件大小: 0K
描述: IC UART PCI BUS 5V OCTAL 144LQFP
产品培训模块: UART Product Overview
标准包装: 60
特点: *
通道数: 8
FIFO's: 64 字节
规程: RS485
电源电压: 4.5 V ~ 5.5 V
带自动流量控制功能:
带IrDA 编码器/解码器:
带故障启动位检测功能:
带调制解调器控制功能:
安装类型: 表面贴装
封装/外壳: 144-LQFP
供应商设备封装: 144-LQFP(20x20)
包装: 托盘
其它名称: 1016-1287
XR17C158
xr
5V PCI BUS OCTAL UART
REV. 1.4.3
54
5.0 PROGRAMMING EXAMPLES
These examples are for devices with top mark date codes of "GC YYWW" and older.
5.1
UNLOADING RECEIVE DATA USING THE SPECIAL RECEIVE FIFO DATA WITH STATUS
It is suggested that before starting to read the Special Receive FIFO Data with Status to unload data from any
UART channel (address 0x180 for channel 0), do a dummy write to the Device ID (DVID) register in the Config-
uration Register of the device. The DVID register is a read-only register, so writing to it will not affect any of the
settings of the UART. The Special Receive FIFO Data with Status register can then be read multiple times sub-
sequently without any byte-swapping problem as long as no other register (except the Device ID register) is ac-
cessed in between data unload. If you must read or write to another register, make that dummy write to the
DVID register again and continue with data unloading.
A step by step procedure describing the sequence for a target channel is shown below. From the receive data
service routine:
Do a dummy write to Device ID (DVID) register. Address 0x8D in BYTE alignment or address 0x8C in DWORD
alignment.
Read the data byte and its associated error status from ‘Special Receive FIFO Data with Status’ register of the target
channel until done or empty when one of the LSR status byte bit-0=0.
NOTE: If you must do other Read/Write operations to other register(s) during data unloading, repeat steps 1 &
2 to continue unloading data plus status from the ‘Special Receive FIFO Data with Status’ register of the target
channel.
Some Examples of using the Special Receive FIFO Data with Status:
EXAMPLE I: POLLING
.....................
Read LSR
Write DVID
Read Special Receive FIFO Data with Status (address 0x180 for channel 0, etc)
Read Special Receive FIFO Data with Status (address 0x180 for channel 0, etc)*
....................
EXAMPLE 2: INTERRUPT SERVICE USING INTERRUPT INFORMATION IN DEVICE CONFIGURATION REGISTER SET
.....................
Read Global Interrupt Register INT0 (address 0x080)
Read INT1 through INT3 registers to identify interrupting channel (address 0x081 through 0x083)
Write DVID
Read Special Receive FIFO Data with Status (address 0x180 for channel 0, etc)
Read Special Receive FIFO Data with Status (address 0x180 for channel 0, etc)*
Read Special Receive FIFO Data with Status (address 0x180 for channel 0, etc)
................
EXAMPLE 3: INTERRUPT SERVICE USING INTERRUPT INFORMATION IN INDIVIDUAL CHANNELS REGISTERS
................
Read Global Interrupt Register INT0 (address 0x080)
Read ISR register of interrupting channel
Write DVID
Read Special Receive FIFO Data with Status (address 0x180 for channel 0, etc)
Read Special Receive FIFO Data with Status (address 0x180 for channel 0, etc)*
Read Special Receive FIFO Data with Status (address 0x180 for channel 0, etc)
................
* In case some other registers need to be accessed in between ‘Special Receive FIFO Data with Status’ reads,
a ‘Write DVID’ instruction has to be inserted before resuming ‘Special Receive FIFO Data with Status’ read
operation.
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