参数资料
型号: XRT8001IP-F
厂商: Exar Corporation
文件页数: 15/48页
文件大小: 0K
描述: IC WAN CLOCK E1/E1 DUAL 18PDIP
产品变化通告: XRT obsolescence 05/Mar/2012
标准包装: 41
类型: 时钟/频率发生器
PLL:
主要目的: 以太网(WAN),T1/E1
输入: 时钟
输出: 时钟
电路数: 1
比率 - 输入:输出: 1:2
差分 - 输入:输出: 无/无
频率 - 最大: 16.384kHz
电源电压: 3.3 V ~ 5 V
工作温度: -40°C ~ 85°C
安装类型: 通孔
封装/外壳: 18-DIP(0.300",7.62mm)
供应商设备封装: 18-PDIP
包装: 管件
XRT8001
22
Rev. 1.01
Step 3 – Upon reviewing Table 4, write the listed value
(under the “Value to Write to D4 – D1 in CR0” Register
Column) into the D4 through D1 bit-fields within Com-
mand Register CR0, as illustrated below.
Note: If the user wishes to output a clock signal via the
CLK1 output signal, then he/she should also write a “1” into
the “PL1EN” bit-field within Command Register CR0.
This step configures the XRT8001 to operate in the
“Forward/Master” Mode.
Step 4 – Next, you need to specify the value for “N”
(e.g., as in the “N x 1.544MHz” or “N x 2.048MHz” clock
signal which is to be applied to the “FIN” input pin.)
In order to specify the value for “N”, one needs to write
the value of “N - 1” (in binary format) into the “D4 through
D1” bits within Command Register CR1, as illustrated
below.
Command Register CR0 (Address = 0x00)
D4
D3
D2
D1
D0
IOC4
IOC3
IOC2
IOC1
PL1EN
Value to Write to D4 – D1 in CR0
X
Command Register, CR1 (Address = 0x01)
D4
D3
D2
D1
D0
M4
M3
M2
M1
PL2EN
Value of “N - 1” (in Binary Format)
X
For example, if the user wishes to configure the
XRT8001 to accept a 1.544MHz clock signal, via the
“FIN” input pin (e.g., N = 1), then the user should write
in the value “0”, into Command Register CR1.
Note: If the user wishes to output a clock signal via the
CLK2 output signal, then he/she should also write a “1” into
the “PL2EN” bit-field within Command Register CR1.
Step 5 – Specify the value of “K” (e.g., as in the “K x
56kHz” or “K x 64kHz” clock signal which is to be output
via the CLK1 output signal).
Command Register, CR2 (Address = 0x02)
D4
D3
D2
D1
D0
SEL14
SEL13
SEL12
SEL11
SEL10
Value of “K - 1” (in Binary Format).
For example, if one wishes to configure the XRT8001
to output a clock signal of either “56kHz” or “64kHz”
(e.g., where “K” = 1) via the CLK1 output pin, then he/
she should write the value “0”, into Command Register
CR2.
Step 6 – Specify the value of “K” (e.g., as in the “K x
56kHz” or “K x 64kHz” clock signal which is to be output
via the CLK2 output signal).
In order to specify the value for “K”, one needs to write
the value of “K - 1” (binary format) into Command
Register CR3, as illustrated below.
Command Register, CR3 (Address = 0x03)
D4
D3
D2
D1
D0
SEL24
SEL23
SEL22
SEL21
SEL20
Value of “K - 1” (in Binary Format).
For example, if one wishes to configure the XRT8001
to output a clock signal of either “1.792MHz” or
“2.048MHz” (e.g., where “K” = 32) via the CLK2 output
pin, then he/she should write the value “31” (or “1 1 1
1 1” in binary format) into Command Register CR3.
Step 7 – Enable any of the following output signals as
appropriate:
“SYNC”, “CLK1”, “CLK2” and
“LOCKDET”.
This is accomplished by writing a “1” into the corre-
sponding bit-fields, within Command Register CR4, as
illustrated below.
Command Register CR4, (Address = 0x04)
D4
D3
D2
D1
D0
SYNCEN
CLK1EN
CLK2EN
LDETDIS2
LDETDIS1
1
0
Note: For information on the “LDETDIS1” and “LDETDIS2”
bit-fields, please see Table 3.
In order to specify the value for “K”, one needs to write
the value of “K - 1” (in binary format) into Command
Register CR2, as illustrated below.
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