参数资料
型号: XRT83SL30IV-F
厂商: Exar Corporation
文件页数: 51/76页
文件大小: 0K
描述: IC LIU T1/E1/J1 SGL 64TQFP
标准包装: 160
类型: 线路接口装置(LIU)
驱动器/接收器数: 1/1
规程: T1,E1,J1
电源电压: 3.135 V ~ 3.465 V
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-TQFP(10x10)
包装: 托盘
XRT83SL30
52
REV. 1.0.1
SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
TABLE 23: MICROPROCESSOR REGISTER #5 BIT DESCRIPTION
REGISTER ADDRESS
00101
FUNCTION
REGISTER
TYPE
RESET
VALUE
BIT #
NAME
D7
Reserved
RO
0
D6
DMO
Driver Monitor Output:
This bit is set to a "1" to indicate trans-
mit driver failure is detected. The value of this bit is based on the
current status of DMO. If the DMOIE bit is enabled, any transition
on this bit will generate an Interrupt.
RO
0
D5
FLS
FiFO Limit Status:
This bit is set to a "1" to indicate that the jitter
attenuator read/write FIFO pointers are within +/- 3 bits. If the
FLSIE bit is enabled, any transition on this bit will generate an
Interrupt.
RO
0
D4
LCV
Line Code Violation:
This bit is set to a "1" to indicate that the
receiver is currently detecting a Line Code Violation or an exces-
sive number of zeros in the B8ZS or HDB3 modes. If the LCVIE
bit is enabled, any transition on this bit will generate an Interrupt.
RO
0
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