参数资料
型号: XRT91L32IQ-F
厂商: Exar Corporation
文件页数: 13/37页
文件大小: 0K
描述: IC TXRX SONET/SDH 8BIT 100QFP
标准包装: 20
类型: 收发器
规程: SONET/SDH
电源电压: 3.3V
安装类型: 表面贴装
封装/外壳: 100-BQFP
供应商设备封装: 100-QFP(14x20)
包装: 托盘
其它名称: 1016-1489
XRT91L32IQ-F-ND
XRT91L32
xr
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
REV. 1.0.2
18
2.8
Receive Parallel Output Interface
The 8-bit Single-Ended LVTTL running at 77.76 Mbps (STS-12/STM-4) or 19.44 Mbps (STS-3/STM-1) parallel
data output of the receive path is used to interface to a SONET Framer/ASIC synchronized to the recovered
clock. A simplified block diagram is shown in Figure 9.
2.9
Disable Parallel Receive Data Output Upon LOS
The parallel receiver outputs are automatically pulled "Low" or forced to a logic state of "0" during a LOS
condition to prevent data chattering unless LOS detection is disabled by asserting DLOSDIS and keeping
LOSEXT input pin "high." In addition, the user can also assert LOSEXT input pin "low" from the optical module
to force an LOS and mute the parallel receiver outputs as well (while DLOSDIS input is also low, see Figure 7.)
FIGURE 9. RECEIVE PARALLEL OUTPUT INTERFACE BLOCK
SONET Framer/ASIC
XRT91L32
STS-12/STM-4
or
STS-3/STM-1
Transceiver
RXPCLKO
RXDO[7:0]
8
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