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| 型号： | XRT91L32IQ-F |
| 厂商： | Exar Corporation |
| 文件页数： | 8/37页 |
| 文件大小： | 0K |
| 描述： | IC TXRX SONET/SDH 8BIT 100QFP |
| 标准包装： | 20 |
| 类型： | 收发器 |
| 规程： | SONET/SDH |
| 电源电压： | 3.3V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-BQFP |
| 供应商设备封装： | 100-QFP（14x20） |
| 包装： | 托盘 |
| 其它名称： | 1016-1489 XRT91L32IQ-F-ND |
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XRT91L32
xr
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
REV. 1.0.2
14
2.3
Receive Clock and Data Recovery
The clock and data recovery (CDR) unit accepts the high speed NRZ serial data from the Differential LVPECL
receiver and generates a clock that is the same frequency as the incoming data. The clock recovery can either
utilize the transmitter’s CMU reference clock from either REFCLKP/N or TTLREFCLK or it can use
independent clock source CDRAUXREFCLK to train and monitor its clock recovery PLL. Initially upon startup,
the PLL locks to the local reference clock within ±500 ppm. Once this is achieved, the PLL then attempts to
lock onto the incoming receive data stream. Whenever the recovered clock frequency deviates from the local
reference clock frequency by more than approximately ±500 ppm, the clock recovery PLL will switch and lock
back onto the local reference clock. Whenever a Loss of Lock or a Loss of Signal event occurs, the CDR will
continue to supply a receive clock (based on the local reference) to the framer/mapper device. When the
LOSEXT is asserted by the optical module or when LOS is detected, the receive parallel data output will be
forced to a logic zero state for the entire duration that a LOS condition is detected. This acts as a receive data
mute upon LOS function to prevent random noise from being misinterpreted as valid incoming data. When the
LOSEXT becomes inactive and the recovered clock is determined to be within ±500 ppm accuracy with respect
to the local reference source and LOS is no longer declared, the clock recovery PLL will switch and lock back
onto the incoming receive data stream. Table 5 shows Clock and Data Recovery reference clock settings.
Table 6 specifies the Clock and Data Recovery Unit performance characteristics.
TABLE 5: CLOCK DATA RECOVERY UNIT REFERENCE CLOCK SETTINGS
1Requires frequency accuracy better than 20ppm in order for the transmitted data rate frequency to have the necessary
accuracy required for SONET systems.
2CDRAUXREFCLK requires accuracy of 77.76 MHz +/- 500ppm.
CMUFREQSEL CDRREFSEL
STS12/
STS3
REFCLKP/N1OR
TTLREFCLK1
FREQUENCY (MHZ)
CDRAUXREFCLK2
FREQUENCY (MHZ)
CDR OUTPUT
FREQUENCY (MHZ)
0
77.76 MHz
not used
155.52
0
1
77.76 MHz
not used
622.08
1
0
19.44 MHz
not used
155.52
1
0
1
19.44 MHz
not used
622.08
X
1
0
not referenced by CDR
77.76 MHz
155.52
X
1
not referenced by CDR
77.76 MHz
622.08
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XRT91L32IQTR | 功能描述:LIN 收发器 PHY Transceiver RoHS:否 制造商:NXP Semiconductors 工作电源电压: 电源电流: 最大工作温度: 封装 / 箱体:SO-8 |
| XRT91L32IQTR-F | 功能描述:LIN 收发器 PHY Transceiver RoHS:否 制造商:NXP Semiconductors 工作电源电压: 电源电流: 最大工作温度: 封装 / 箱体:SO-8 |
| XRT91L33 | 制造商:EXAR 制造商全称:EXAR 功能描述:STS-12/STS-3 MULTIRATE CLOCK AND DATA RECOVERY UNIT |
| XRT91L33AIG-F | 制造商:Exar Corporation 功能描述:CDR 155.52Mbps/622.08Mbps SONET/SDH 20-Pin TSSOP |
| XRT91L33ES | 功能描述:界面开发工具 Eval System for XRT91L33 Series RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
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