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| 型号： | ZL2106ALCFT |
| 厂商： | Intersil |
| 文件页数： | 21/29页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 6A 36QFN |
| 标准包装： | 4,000 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.54 V ~ 5.5 V |
| 输入电压： | 4.5 V ~ 14 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 200kHz ~ 1MHz |
| 电流 - 输出： | 6A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 36-VFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 36-QFN（6x6） |
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ZL2106
for more information on configuring tracking mode using PMBus
commands.
Figure 23 is an example of a basic pin-strap tracking
configuration. The VTRK pin is an analog input that, when
tracking mode is enabled, the voltage applied to the VTRK pin
performs as a reference for the device's output voltage. The
ZL2106 offers two modes of tracking: coincident and ratiometric.
Figures 20 and 21 illustrate the output voltage waveform for the
two tracking modes.
SDA
SCL
0
A.
0
Ratiometric Tracking
Track @ 50% Vout Lim ited
Vref = 1.8V VRef
Vmem = 0.9V
Ton Dly Toff Dly
EN
Track @ 50% Vtrk Limited
Vref = 1.8V Vref
Vmem = 0.8V
Ton Dly Toff Dly
EN
Vmem
Vmem
Vref=1.8V
Vmem=0.9V
Vref=1.8V
Vmem=0.8V
SDA SCL
VOUT_R
SDA SCL
VOUT_M
B.
?
ZL2106
SW
L4
ZL2106
VTRK SW
L3
FIGURE 21. RATIOMETRIC TRACKING
REFERENCE
MEMBER
Tracking Overview
When the ZL2106 is configured to the voltage tracking mode, the
FIGURE 19. BASIC I 2 C TRACKING CONFIGURATION
1. Coincident. This mode configures the ZL2106 to ramp its
output voltage at the same rate as the voltage applied to the
VTRK pin. Two options are available for this mode;
a. Track at 100% V OUT limited. Member rail tracks the reference
rail and stops when the member reaches its target voltage,
Figure 20 (A).
b. Track at 100% VTRK limited. Member rail tracks the
reference at the instantaneous voltage value applied to the
VTRK pin, Figure 20 (B).
Coincident Tracking
voltage applied to the VTRK pin acts as a reference for the
member device(s) output regulation. The soft-start values
(Rise/Fall times) are used to calculate the loop gain used during
the turn-on/turn-off ramps, therefore the minimum rise/fall time
has been constrained to 5ms to ensure accuracy. Tracking
accuracy can be improved by increasing the rise and fall times
beyond 5ms.
Tracking Groups
In a tracking group, the device configured to the highest voltage
within the group is defined as the reference device. The device(s)
that track the reference are called the member device(s). The
reference device will control the ramp delay and ramp rate of all
0
A.
0
Track @ 100% Vout Limited
Vref > Vmem VRef
Ton Dly
EN
Track @ 100% Vtrk Limited
Vref = Vmem VRef
To n Dly
Toff Dly
Toff Dly
Vmem
Vmem
Vref=1.8V
Vmem=0.9V
Vref=1.8V
Vmem=1.8V
tracking devices and is not placed in the tracking mode.
The reference device is configured to the highest output voltage
for the group and all other device(s) output voltages are meant to
track and never exceed the reference device output voltage.
The reference device must be configured to have a minimum
Time-On Delay and Time-On Rise as shown in Equation 13.
tON DLY(REF) ≥ tON DLY(MEM) + tON RISE(REF) + 5ms ≥ tON DLY(MEM) + 10ms
(EQ. 13)
EN
B.
?
This delay allows the member device(s) to prepare their control
loops for tracking following the assertion of ENABLE.
FIGURE 20. COINCIDENT TRACKING
2. Ratiometric. This mode configures the ZL2106 to ramp its
output voltage as a percentage of the voltage applied to the
VTRK pin. The default setting is 50%, but an external resistor
may be used to configure a different tracking ratio.
a. Track at 50% V OUT limited. Member rail tracks the reference
rail and stops when the member reaches 50% of the target
The member device Time-Off Delay has been redefined to
describe the time that the VTRK pin will follow the reference
voltage after enable is de-asserted. The delay setting sets the
timeout for the member's output voltage to turnoff in the event
that the reference output voltage does not achieve zero volts.
The member device(s) must have a minimum Time-Off Delay of
as shown in Equation 14.
voltage, Figure 21 (A).
b. Track at 50% VTRK limited. Member rail tracks the reference
tOFF DLY(MEM) ≥ tOFF DLY(REF) + tOFF FALL(REF) + 5ms
(EQ. 14)
at the instantaneous voltage value applied to the VTRK pin
until the member rail reaches 50% of the reference rail
voltage, or if the member is configured to less than 50% of the
reference the member will achieve its configured target,
Figure 21 (B).
21
It is assumed for a tracking group, that all of the ENABLE pins are
connected together and driven by a single logic source or PMBus
Broadcast Enable is used.
The configuration settings for Figures 20 and 21 are shown
below in Figure 22. In each case the reference and member rise
times are set to the same value.
FN6852.6
February 20, 2013
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