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| 型号： | ZL2106ALCFT |
| 厂商： | Intersil |
| 文件页数： | 22/29页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 6A 36QFN |
| 标准包装： | 4,000 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.54 V ~ 5.5 V |
| 输入电压： | 4.5 V ~ 14 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 200kHz ~ 1MHz |
| 电流 - 输出： | 6A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 36-VFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 36-QFN（6x6） |
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ZL2106
Tracking ? Configuration ? Figure ? 20 ? (A)
Tracking Configured by Pin-Strap
Rail
Reference
Member
Vout
Set
(Volts)
1.8
0.9
Time ? On
? Dly
(ms)
15
5
Time ? On
Rise
(ms)
5
5
Time ? Off
? Dly
(ms)
5
15
Time ? Off
Fall
( ? ms)
5
5
Mode
Track ? Disabled
100% ? Vout ? Limited
Tracking is enabled with the CFG pin as shown in Table 16 on
as shown in Table 13 on page 22. Figure 23 shows the basic
schematic of pin-strap tracking.
Rail
Vout ? Set
(Volts)
Tracking ? Configuration ? Figure ? 20 ? (B)
Time ? On Time ? On Time ? Off Time ? Off
? Dly Rise ? Dly Fall
(ms) (ms) (ms) ( ? ms)
Mode
Voltage Margining
The ZL2106 offers a simple means to vary its output higher or
Reference
Member
1.8
1.8
15
5
5
5
5
15
5
5
Track ? Disabled
100% ? VTRK ? Limited
lower than its nominal voltage setting in order to determine
whether the load device is capable of operating over its specified
Rail
Reference
Vout ? Set
(Volts)
1.8
Tracking ? Configuration ? Figure ? 21 ? (A)
Time ? On Time ? On Time ? Off Time ? Off
? Dly Rise ? Dly Fall
(ms) (ms) (ms) ( ? ms)
15 5 5 5
Mode
Track ? Disabled
supply voltage range. The MGN command is set by driving the
MGN pin or through the I 2 C/SMBus interface. The MGN pin is a
tri-level input that is continuously monitored and can be driven
directly by a processor I/O pin or other logic-level output.
Member
0.9
5
5
15
5
Track ? 50% ? Vout ? Limited
The ZL2106’s output will be forced higher than its nominal set
Rail ? Dly Rise ? Dly Fall Mode
(Volts)
Tracking ? Configuration ? Figure ? 21 ? (B)
Time ? On Time ? On Time ? Off Time ? Off
Vout ? Set
0.8
(ms) (ms) (ms) ( ? ms)
Reference 1.8 15 5 5 5 Track ? Disabled
Member 1.8 5 5 15 5 Track ? 50% ? VTRK ? Limited
FIGURE 22. TRACKING CONFIGURATION FOR FIGURES 20 AND 21
point when the MGN command is set HIGH, and the output will
be forced lower than its nominal set point when the MGN
command is set LOW. Default margin limits of V NOM ±5% are pre-
loaded in the factory, but the margin limits can be modified
through the I 2 C/SMBus interface to as high as V NOM + 10% or as
low as 0V, where V NOM is the nominal output voltage set point
determined by the VSET pin. The ZL2106-01 allows 150% margin
ENABLE
EN
ZL2106
SW
REFERENCE
CFG SS
VOUT_R
L1
EN
ZL2106
VTRK SW
MEMBER
CFG SS
VOUT_M
L2
limits.
The margin limits and the MGN command can both be set
individually through the I 2 C/SMBus interface. Additionally, the
transition rate between the nominal output voltage and either
margin limit can be configured through the I 2 C/SMBus interface.
Please refer to Application Note AN2033 for detailed instructions
R1
R3
R2
R4
on modifying the margining configurations.
FIGURE 23. BASIC PIN-STRAP TRACKING CONFIGURATION
TABLE 13. TRACKING MODE CONFIGURATION
R SS
(k Ω )
19.6
UVLO
(V)
TRACKING RATIO
(%)
UPPER TRACK LIMIT
Limited by target voltage
RAMP-UP/DOWN BEHAVIOR
Output not allowed to decrease before PG
21.5
23.7
26.1
28.7
31.6
34.8
38.3
56.2
61.9
68.1
75
82.5
90.9
100
5.5
7.5
100
50
100
50
Limited by VTRK pin voltage
Limited by target voltage
Limited by VTRK pin voltage
Limited by target voltage
Limited by VTRK pin voltage
Limited by target voltage
Limited by VTRK pin voltage
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
110
22
Output will always follow VTRK
FN6852.6
February 20, 2013
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| ZL2106ALCFTK | 功能描述:IC REG BUCK SYNC ADJ 6A 36QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:两者兼有 输出数:1 输出电压:5V，1 V ~ 10 V 输入电压:3.5 V ~ 28 V PWM 型:电流模式 频率 - 开关:220kHz ~ 1MHz 电流 - 输出:600mA 同步整流器:无 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:16-SSOP（0.154"，3.90mm 宽） 包装:带卷 (TR) 供应商设备封装:16-QSOP |
| ZL2106ALCFTR5520 | 制造商:Intersil Corporation 功能描述:6A DIGITAL DC-DC CONVERTER W/ DDC - TR4K - Tape and Reel |
| ZL2106ALCN | 功能描述:IC REG BUCK SYNC ADJ 6A 36QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:3.3V 输入电压:4.5 V ~ 24 V PWM 型:- 频率 - 开关:- 电流 - 输出:125mA 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-6 包装:Digi-Reel® 供应商设备封装:SOT-6 其它名称:MAX1836EUT33#TG16DKR |
| ZL2106ALCNT | 功能描述:IC REG BUCK SYNC ADJ 6A 36QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:3.3V 输入电压:4.5 V ~ 24 V PWM 型:- 频率 - 开关:- 电流 - 输出:125mA 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-6 包装:Digi-Reel® 供应商设备封装:SOT-6 其它名称:MAX1836EUT33#TG16DKR |
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