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| 型号： | ZL2106ALCFT |
| 厂商： | Intersil |
| 文件页数： | 24/29页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 6A 36QFN |
| 标准包装： | 4,000 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.54 V ~ 5.5 V |
| 输入电压： | 4.5 V ~ 14 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 200kHz ~ 1MHz |
| 电流 - 输出： | 6A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 36-VFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 36-QFN（6x6） |
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ZL2106
Phase Spreading
When multiple point of load converters share a common DC
input supply, it is desirable to adjust the clock phase offset of
TABLE 16. CFG PIN CONFIGURATIONS FOR SEQUENCING AND
TRACKING
SYNC PIN
each device such that not all devices start to switch
simultaneously. Setting each converter to start its switching cycle
at a different point in time can dramatically reduce input
capacitance requirements and efficiency losses. Since the peak
current drawn from the input supply is effectively spread out over
a period of time, the peak current drawn at any given moment is
reduced and the power losses proportional to the I RMS2 are
reduced dramatically.
In order to enable phase spreading, all converters must be
synchronized to the same switching clock. The CFG pin is used to
set the configuration of the SYNC pin for each device as
Selecting the phase offset for the device is accomplished by
selecting a device address according to the following equation:
Phase offset = device address x 45°
For example:
? A device address of 0x00 or 0x20 would configure no phase
offset
? A device address of 0x01 or 0x21 would configure 45° of
phase offset
? A device address of 0x02 or 0x22 would configure 90° of
phase offset
R CFG
Low
Open
High
10k Ω
11k Ω
12.1k Ω
14.7k Ω
16.2k Ω
17.8k Ω
21.5k Ω
23.7k Ω
26.1k Ω
31.6k Ω
34.8k Ω
38.3k Ω
46.4k Ω
51.1k Ω
CONFIGURATION
Input
Auto detect
Output
Input
Auto detect
Output
Input
Auto detect
Output
Input
Auto detect
Output
Input
Auto detect
Output
Input
Auto detect
SEQUENCING CONFIGURATION
Sequencing and Tracking are
disabled.
Sequencing and Tracking are
disabled.
Device is FIRST in nested
sequence. Tracking disabled.
Device is LAST in nested
sequence. Tracking disabled.
Device is MIDDLE in nested
sequence. Tracking disabled.
Sequence disabled. Tracking
enabled as defined in Table 13.
The phase offset of each device may also be set to any value
between 0° and 360° in 22.5° increments via the I 2 C/SMBus
interface. Refer to Application Note AN2033 for further details.
Output Sequencing
A group of Zilker Labs devices may be configured to power up in
a predetermined sequence. This feature is especially useful when
powering advanced processors, FPGAs, and ASICs that require
one supply to reach its operating voltage prior to another supply
reaching its operating voltage in order to avoid latch-up from
occurring. Multi-device sequencing can be achieved by
configuring each device through the I 2 C/SMBus interface or by
using Zilker Labs patented autonomous sequencing mode.
Autonomous sequencing mode configures sequencing by using
events transmitted between devices over the DDC bus.
The sequencing order is determined using each device’s SMBus
address. Using autonomous sequencing mode (configured using
the CFG pin), the devices must be assigned sequential SMBus
addresses with no missing addresses in the chain. This mode will
also constrain each device to have a phase offset according to its
24
56.2k Ω Output
The sequencing group will turn on in order starting with the
device with the lowest SMBus address and will continue through
to turn on each device in the address chain until all devices
connected have been turned on. When turning off, the device
with the highest SMBus address will turn off first followed in
reverse order by the other devices in the group.
Sequencing is configured by connecting a resistor from the CFG
pin to ground as described in Table 16. The CFG pin is also used
to set the configuration of the SYNC pin as well as to determine
the sequencing method and order. Please refer to section
the operating parameters of the SYNC pin.
Multiple device sequencing may also be achieved by issuing
PMBus commands to assign the preceding device in the
sequencing chain as well as the device that will follow in the
sequencing chain. This method places fewer restrictions on the
SMBus address (no need of sequential address) and also allows
the user to assign any phase offset to any device irrespective of
its SMBus device address.
The Enable pins of all devices in a sequencing group must be tied
together and driven high to initiate a sequenced turn-on of the
group. Enable must be driven low to initiate a sequenced turnoff
of the group. Please refer to Application Note AN2033 for details
on sequencing via the I 2 C/SMBus interface.
FN6852.6
February 20, 2013
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| ZL2106ALCFTK | 功能描述:IC REG BUCK SYNC ADJ 6A 36QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:两者兼有 输出数:1 输出电压:5V，1 V ~ 10 V 输入电压:3.5 V ~ 28 V PWM 型:电流模式 频率 - 开关:220kHz ~ 1MHz 电流 - 输出:600mA 同步整流器:无 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:16-SSOP（0.154"，3.90mm 宽） 包装:带卷 (TR) 供应商设备封装:16-QSOP |
| ZL2106ALCFTR5520 | 制造商:Intersil Corporation 功能描述:6A DIGITAL DC-DC CONVERTER W/ DDC - TR4K - Tape and Reel |
| ZL2106ALCN | 功能描述:IC REG BUCK SYNC ADJ 6A 36QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:3.3V 输入电压:4.5 V ~ 24 V PWM 型:- 频率 - 开关:- 电流 - 输出:125mA 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-6 包装:Digi-Reel® 供应商设备封装:SOT-6 其它名称:MAX1836EUT33#TG16DKR |
| ZL2106ALCNT | 功能描述:IC REG BUCK SYNC ADJ 6A 36QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:3.3V 输入电压:4.5 V ~ 24 V PWM 型:- 频率 - 开关:- 电流 - 输出:125mA 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-6 包装:Digi-Reel® 供应商设备封装:SOT-6 其它名称:MAX1836EUT33#TG16DKR |
| ZL2106ALCNTK | 功能描述:IC REG BUCK SYNC ADJ 6A 36QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:3.3V 输入电压:4.5 V ~ 24 V PWM 型:- 频率 - 开关:- 电流 - 输出:125mA 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-6 包装:Digi-Reel® 供应商设备封装:SOT-6 其它名称:MAX1836EUT33#TG16DKR |
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