参数资料
型号: ZL2106ALCFT
厂商: Intersil
文件页数: 23/29页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 6A 36QFN
标准包装: 4,000
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.54 V ~ 5.5 V
输入电压: 4.5 V ~ 14 V
PWM 型: 电压模式
频率 - 开关: 200kHz ~ 1MHz
电流 - 输出: 6A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 36-VFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 36-QFN(6x6)
ZL2106
I 2 C/SMBus Communications
The ZL2106 provides an I 2 C/SMBus digital interface that enables
the user to configure all aspects of the device operation as well
as monitor the input and output parameters. The ZL2106 can be
used with any standard 2-wire I 2 C host device.
In addition, the device is compatible with SMBus version 2.0 and
The minimum pull-up resistance should be limited to a value that
enables any device to assert the bus to a voltage that will ensure
a logic 0 (typically 0.8V at the device monitoring point) given the
pull-up voltage (5V if tied to VRA) and the pull-down current
capability of the ZL2106 (nominally 4mA).
TABLE 15. SMBus ADDRESS VALUES
includes an SALRT line to help mitigate bandwidth limitations
related to continuous fault monitoring. Pull-up resistors are
required on the I 2 C/SMBus as specified in the SMBus 2.0
specification. The ZL2106 accepts most standard PMBus
commands. When controlling the device with PMBus commands,
it is recommended that the enable pin is tied to SGND.
I 2 C/SMBus Device Address Selection
When communicating with multiple devices using the
I 2 C/SMBus interface, each device must have its own unique
address so the host can distinguish between the devices. The
device address can be set according to the pin-strap options
listed in Table 14. Address values are right-justified.
TABLE 14. SMBUS DEVICE ADDRESS SELECTION
R SA
(k Ω )
10
11
12.1
13.3
14.7
16.2
17.8
19.6
21.5
SMBus Address
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
SA PIN SETTING
LOW
OPEN
HIGH
SMBus ADDRESS
0x20
0x21
0x22
23.7
26.1
28.7
31.6
0x29
0x2A
0x2B
0x2C
If additional device addresses are required, a resistor can be
connected to the SA pin according to Table 15 to provide up to 30
unique device addresses.
Digital-DC Bus
The Digital-DC Communications (DDC) bus is used to
communicate between Zilker Labs Digital-DC devices. This
dedicated bus provides the communication channel between
devices for features such as sequencing and fault spreading. The
DDC pin on all Digital-DC devices in an application should be
connected together. A pull-up resistor is required on the DDC bus
in order to guarantee the rise time as expressed in Equation 15:
34.8
38.3
42.2
46.4
51.1
56.2
61.9
68.1
75
0x2D
0x2E
0x2F
0x30
0x31
0x32
0x33
0x34
0x35
Rise Time = R PU ?C LOAD ≈ 1μs
(EQ. 15)
82.5
0x36
Where R PU is the DDC bus pull-up resistance and C LOAD is the bus
loading. The pull-up resistor may be tied to VRA or to an external
3.3V or 5V supply as long as this voltage is present prior to or
during device power-up. As rules of thumb, each device
connected to the DDC bus presents approximately 10pF of
capacitive loading, and each inch of FR4 PCB trace introduces
approximately 2pF. The ideal design will use a central pull-up
resistor that is well matched to the total load capacitance. In
power module applications, the user should consider whether to
place the pull-up resistor on the module or on the PCB of the end
application.
23
90.9
100
110
121
133
147
162
0x37
0x38
0x39
0x3A
0x3B
0x3C
0x3D
FN6852.6
February 20, 2013
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