- 您现在的位置：买卖IC网 > PDF目录206349 > ZPSD401A2V-C-20JI 16K X 16 OTPROM, 40 I/O, PIA-GENERAL PURPOSE, PQCC68 PDF资料下载
参数资料
| 型号： | ZPSD401A2V-C-20JI |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16K X 16 OTPROM, 40 I/O, PIA-GENERAL PURPOSE, PQCC68 |
| 封装： | PLASTIC, LDCC-68 |
| 文件页数： | 81/128页 |
| 文件大小： | 433K |
| 代理商： | ZPSD401A2V-C-20JI |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页当前第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页
PSD4XX Family
52
9.3.9.1 Control Register
This register is used in both Standard MCU I/O Mode and Address Out modes. For setting
a Standard MCU I/O Mode, a “1” must be written to the corresponding bit in the register.
Writing a “0” to the register is required for the Address Out mode. The register has a default
value of “0” after reset.
9.3.9.2 Direction Register
This register is used to control the direction of data flow in the I/O Ports. Writing a “1” to the
corresponding bit in the register configures the port to be an output port, and a “0” forces
the port to be an input port. The I/O configuration of the port pins can be determined by
reading the Direction Register. After reset, the pins are in input mode.
9.3.9.3 Open Drain
This register determines whether the output pin driver of Ports C or D is a CMOS driver or
an Open Drain driver. Writing a “0” to the register selects a CMOS driver, while a “1” selects
an Open Drain driver.
9.3.9.4 PLD – I/O Register
This is a read only status register. Reading a "1" indicates the corresponding pin is
configured as a PLD pin. A "0" indicates the pin is an I/O pin.
9.3.9.5 Data In Register
This register is used in the Standard MCU I/O Mode configuration to read the input pins.
9.3.9.6 Data Out Register
This register holds the output data in the Standard MCU I/O Mode. The contents of the
register can also be read.
9.3.9.7 Macrocell Out Register
This register enables the user to read the outputs of the GPLD macrocell
(PA, PB, and PE macrocells).
9.3.9.8 I/O Register Address Offset
The I/O Register can be accessed by the microcontroller during normal read/write bus
cycles. The address of a register is defined as:
CSIOP + register address offset
The CSIOP is the base address that is defined in the ABEL file and occupies a 256 byte
space. The register address offset lies within this 256 byte space. Tables 16 and 16a are
the address offset of the registers.
The PSD4XX
Architecture
(cont.)
相关PDF资料 |
PDF描述 |
|---|---|
| ZPSD411A2V-C-20J | 32K X 8 OTPROM, 40 I/O, PIA-GENERAL PURPOSE, PQCC68 |
| ZPSD411A2-C-15L | 32K X 8 UVPROM, 40 I/O, PIA-GENERAL PURPOSE, CQCC68 |
| ZPSD413A1-C-90JI | 128K X 8 OTPROM, 40 I/O, PIA-GENERAL PURPOSE, PQCC68 |
| ZPSD403A1V-C-20UI | 64K X 16 OTPROM, 40 I/O, PIA-GENERAL PURPOSE, PQFP80 |
| ZPSD411A2-C-70U | 32K X 8 OTPROM, 40 I/O, PIA-GENERAL PURPOSE, PQFP80 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ZPSD401A2V-C-20L | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Low Cost Field Programmable Microcontroller Peripherals |
| ZPSD401A2V-C-20U | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Low Cost Field Programmable Microcontroller Peripherals |
| ZPSD401A2V-C-20UI | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Low Cost Field Programmable Microcontroller Peripherals |
| ZPSD401A2V-C-25J | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Low Cost Field Programmable Microcontroller Peripherals |
| ZPSD401A2V-C-25L | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Low Cost Field Programmable Microcontroller Peripherals |
发布紧急采购，3分钟左右您将得到回复。