参数资料
型号: 1GBE-PCS-O4-N1
厂商: Lattice Semiconductor Corporation
文件页数: 11/14页
文件大小: 0K
描述: IP CORE ETH PCS 1GB ORT42G5
标准包装: 1
系列: *
其它名称: 1GBEPCSO4N1
Lattice Semiconductor
1GbE PCS IP Core User’s Guide
forms for the user. These scripts care located in the 1gbe_pcs_o4_1_001\orca4\ver1.0\eval\simula-
tion\scripts .
NOTE: The procedure described here is applicable ONLY when using ModelSim for simulation.
Simulation Procedures
1. Launch ModelSim
2. Using the main GUI, change the directory location
Select: File -> Change Directory -> 1gbe_pcs_o4_1_001\orca4\ver1.0\eval\simulation
3. Execute <user_compile.do> to compile the full chip design and testbench ?les.
Select: Macro -> Execute Macro -> scripts\<user_compile.do>
For ModelSim 5.6a or above:
Select: Tools -> Execute Macro -> scripts\<user_compile.do>
4. Modify the script <user_vsim.do> to point to the sysbus_work and ort82g5_work simulation model. These
models are provided in the ispLEVER installation and ORT42G5.
5. Execute <user_vsim.do> to load the full chip design and testbench
Select: Macro -> Execute Macro -> scripts\<user_vsim.do>
For ModelSim 5.6a or above:
Select: Tools -> Execute Macro -> scripts\<user_vsim.do>
6. Execute <user_wave.do> to load the appropriate waveforms for the simulation
Select: Macro -> Execute Macro -> scripts\<user_wave.do>
For ModelSim 5.6a or above:
Select: Tools -> Execute Macro -> scripts\<user_wave.do>
7. Run the simulation.
Select: Simulate -> Run -> Run-all
Core Implementation
Running Synthesis Using Synplicity’s Synplify
The step-by-step procedure provided below describes how to run synthesis using Synplify outside the ispLEVER
Project Navigator.
1. Change directory to 1gbe_pcs_o4_1_001\orca4\ver1.0\eval\synthesis\synplicity
2. Launch the Synplify synthesis tool
3. Select: Run -> Run TCL Script... -> pcs_1g_top.tcl
4. Within the provided project ?le the speed grade, implementation and device are preselected.
5. A default EDIF is also provided by the project ?le. This top-level EDIF netlist will be used during Place and
Route.
6. Within the supplied synthesis scripts the necessary options have been supplied for a complete synthesis pass.
7. Select Run
8. The EDIF ?le (.edn) will be located in the ver1.0 directory.
11
相关PDF资料
PDF描述
2-106506-2 CONN RCPT 15PS R/A BOARDLOCK MET
2-12-10-983-326 TAPE CONSPICUITY RED/WHT 2X12"
2-1393560-1 V42254A 132V 1=SUB D BOLZENSA
2-1393560-7 V42254A 152V 1=SUB D BOLZENSA
2-1393589-1 CONN SOCKET 10 AMPS
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