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参数资料
| 型号： | 71M6513-IGTR/F |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP100 |
| 封装： | LEAD FREE, LQFP-100 |
| 文件页数： | 33/104页 |
| 文件大小： | 1390K |
| 代理商： | 71M6513-IGTR/F |
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71M6513/71M6513H
3-Phase Energy Meter IC
DATA SHEET
AUGUST 2011
Page: 34 of 104
2005-2011 Teridian Semiconductor Corporation
A Maxim Integrated Products Brand
Bit
Symbol
Function
IRCON.7
-
IRCON.6
-
IRCON.5
IEX6
External interrupt 6 edge flag
IRCON.4
IEX5
External interrupt 5 edge flag
IRCON.3
IEX4
External interrupt 4 edge flag
IRCON.2
IEX3
External interrupt 3 edge flag
IRCON.1
IEX2
External interrupt 2 edge flag
IRCON.0
-
Table 42: The IRCON Bit Functions
Note: Only TF0 and TF1 (timer 0 and timer 1 overflow flag) will be automatically cleared by hardware when the service routine
is called (Signals T0ACK and T1ACK – port ISR – active high when the service routine is called).
External Interrupts
The external interrupts are connected as shown in Table 43. The polarity of interrupts 2 and 3 is programmable in the MPU.
Interrupts 2 and 3 should be programmed for falling sensitivity. The generic 8051 MPU literature states that interrupts 4
through 6 are defined as rising edge sensitive. Thus, the hardware signals attached to interrupts 5 and 6 are inverted to
achieve the edge polarity shown in Table 43.
SFR (special function register) enable bits must be set to permit any of these interrupts to occur. Likewise, each interrupt has
its own flag bit that is set by the interrupt hardware and is reset automatically by the MPU interrupt handler (0 through 5).
XFER_BUSY and RTC_1SEC, which are OR-ed together, have their own enable and flag bits in addition to the interrupt 6
enable and flag bits (see Table 44), and these interrupts must be cleared by the MPU software.
External
Interrupt
Connection
Polarity
Flag Reset
0
Digital I/O High Priority
see DIO_Rx
automatic
1
Digital I/O Low Priority
see DIO_Rx
automatic
2
Comparator 2 or 3
falling
automatic
3
CE_BUSY
falling
automatic
4
Comparator 2 or 3
rising
automatic
5
EEPROM busy
falling
automatic
6
XFER_BUSY OR RTC_1SEC
falling
manual
Table 43: External MPU Interrupts
Interrupt 6 is edge-sensitive. The RTC_1SEC interrupt from the RTC and the XFER_BUSY interrupt from the CE are com-
bined using a logic OR function and the result is routed into interrupt 6. Therefore, both flags must be cleared at least once
during initialization, and both flags must always be cleared before exiting the interrupt service routine (ISR) for interrupt 6.
Note 1: If clearing of both flags is not performed, then no edge can occur to trigger interrupt 6 later resulting in the ISR for the
XFER_BUSY ceasing to run.
Note 2: Clearing both flags reliably requires some care. Either flag can be set by hardware while interrupt 6 code is running on
behalf of the other interrupt. In this situation, the unprocessed interrupt can create a lockout condition similar to the one in note
1. To prevent this lockout one must always process both interrupt flags in the same service routine.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 71M6515H | 制造商:TERIDIAN 制造商全称:TERIDIAN 功能描述:Energy Meter IC |
| 71M6515H_11 | 制造商:TERIDIAN 制造商全称:TERIDIAN 功能描述:Up to 10ppmC precision ultra-stable voltage reference Digital temperature compensation |
| 71M6515H-DB | 功能描述:开发板和工具包 - 8051 71M6515H Demo Brd RoHS:否 制造商:Silicon Labs 产品:Development Kits 工具用于评估:C8051F960, Si7005 核心: 接口类型:USB 工作电源电压: |
| 71M6515H-IGT | 制造商:Maxim Integrated Products 功能描述:METERING FRONT END - Rail/Tube |
| 71M6515H-IGT/F | 功能描述:计量片上系统 - SoC Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 处理器系列:71M6511 类型:Metering SoC 最大时钟频率:70 Hz 程序存储器大小:64 KB 数据 RAM 大小:7 KB 接口类型:UART 可编程输入/输出端数量:12 片上 ADC: 安装风格:SMD/SMT 封装 / 箱体:LQFP-64 封装:Reel |
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