- 您现在的位置：买卖IC网 > PDF目录294128 > 72V285L15TFI9 (INTEGRATED DEVICE TECHNOLOGY INC) 64K X 18 OTHER FIFO, 10 ns, PQFP64 PDF资料下载
参数资料
| 型号： | 72V285L15TFI9 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | FIFO |
| 英文描述： | 64K X 18 OTHER FIFO, 10 ns, PQFP64 |
| 封装： | STQFP-64 |
| 文件页数： | 22/25页 |
| 文件大小： | 266K |
| 代理商： | 72V285L15TFI9 |
6
COMMERCIAL AND INDUSTRIAL
TEMPERATURERANGES
IDT72V275/72V285 3.3V CMOS SUPERSYNC FIFOTM
32,768 x 18 and 65,536 x 18
AC ELECTRICAL CHARACTERISTICS(1)
(Commercial: VCC = 3.3V ± 0.3V, TA = 0oC to +70oC; Industrial: VCC = 3.3V
± 3.3V, TA = -40°C to + 85°C)
Commercial
Com’l & Ind’l (2)
Commercial
IDT72V275L10
IDT72V275L15
IDT72V275L20
IDT72V285L10
IDT72V285L15
IDT72V285L20
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
fS
Clock Cycle Frequency
—
100
—
66.7
—
50
MHz
tA
Data Access Time
2
6.5
2
10
2
12
ns
tCLK
Clock Cycle Time
10
—
15
—
20
—
ns
tCLKH
Clock High Time
4.5
—
6
—
8
—
ns
tCLKL
Clock Low Time
4.5
—
6
—
8
—
ns
tDS
DataSetupTime
3
—
4
—
5
—
ns
tDH
Data Hold Time
0.5
—
1
—
1
—
ns
tENS
Enable Setup Time
3
—
4
—
5
—
ns
tENH
Enable Hold Time
0.5
—
1
—
1
—
ns
tLDS
LoadSetupTime
3
—
4
—
5
—
ns
tLDH
Load Hold Time
0.5
—
1
—
1
—
ns
tRS
Reset Pulse Width(3)
10
—
15
—
20
—
ns
tRSS
ResetSetupTime
10
—
15
—
20
—
ns
tRSR
Reset Recovery Time
10
—
15
—
20
—
ns
tRSF
Reset to Flag and Output Time
—
10
—
15
—
20
ns
tFWFT
Mode Select Time
0
—
0
—
0
—
ns
tRTS
RetransmitSetupTime
3
—
4
—
5
—
ns
tOLZ
Output Enable to Output in Low Z(4)
0—
0
—
ns
tOE
Output Enable to Output Valid
2
6
3
8
3
10
ns
tOHZ
Output Enable to Output in High Z(4)
26
383
10
ns
tWFF
Write Clock to
FF or IR
—
6.5
—
10
—
12
ns
tREF
Read Clock to
EF or OR
—
6.5
—
10
—
12
ns
tPAF
Write Clock to
PAF
—
6.5
—
10
—
12
ns
tPAE
Read Clock to
PAE
—
6.5
—
10
—
12
ns
tHF
Clock to
HF
—16
—
20
—
22
ns
tSKEW1
Skew time between RCLK and WCLK
5
—
6
—
10
—
ns
for
FF/IR
tSKEW2
Skew time between RCLK and WCLK
12
—
15
—
20
—
ns
for
PAE and PAF
tSKEW3
Skew time between RCLK and WCLK
60
—
60
—
60
—
ns
for
EF/OR
NOTES:
1. All AC timings apply to both Standard IDT mode and First Word Fall Through mode.
2
Industrial Temperature Range Product for the 15ns speed grade is available as a standard device.
3. Pulse widths less than minimum values are not allowed.
4. Values guaranteed by design, not currently tested.
Input Pulse Levels
GND to 3.0V
Input Rise/Fall Times
3ns
Input Timing Reference Levels
1.5V
Output Reference Levels
1.5V
OutputLoad
See Figure 2
AC TEST CONDITIONS
Figure 2. Output Load
* Includes jig and scope capacitances.
4512 drw 04
330
30pF*
510
3.3V
D.U.T.
相关PDF资料 |
PDF描述 |
|---|---|
| 72V3626L15PFG | 256 X 36 BI-DIRECTIONAL FIFO, 10 ns, PQFP128 |
| 72V3684L15PF | 16K X 36 BI-DIRECTIONAL FIFO, 10 ns, PQFP128 |
| 72V845L15PFI8 | 4K X 18 BI-DIRECTIONAL FIFO, 10 ns, PQFP128 |
| 72V805L15PFI9 | 256 X 18 BI-DIRECTIONAL FIFO, 10 ns, PQFP128 |
| 72V805L15PF8 | 256 X 18 BI-DIRECTIONAL FIFO, 10 ns, PQFP128 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 72V285L20PF | 功能描述:先进先出 RoHS:否 制造商:IDT 电路数量: 数据总线宽度:18 bit 总线定向:Unidirectional 存储容量:4 Mbit 定时类型:Synchronous 组织:256 K x 18 最大时钟频率:100 MHz 访问时间:10 ns 电源电压-最大:3.6 V 电源电压-最小:6 V 最大工作电流:35 mA 最大工作温度:+ 85 C 封装 / 箱体:TQFP-80 封装: |
| 72V285L20PF8 | 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 64K x 18 64-Pin TQFP T/R 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 64KX18 64TQFP - Tape and Reel |
| 72V285L20TF | 功能描述:先进先出 RoHS:否 制造商:IDT 电路数量: 数据总线宽度:18 bit 总线定向:Unidirectional 存储容量:4 Mbit 定时类型:Synchronous 组织:256 K x 18 最大时钟频率:100 MHz 访问时间:10 ns 电源电压-最大:3.6 V 电源电压-最小:6 V 最大工作电流:35 mA 最大工作温度:+ 85 C 封装 / 箱体:TQFP-80 封装: |
| 72V285L20TF8 | 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 64KX18 64TQFP - Tape and Reel |
| 72V291L10PF | 功能描述:先进先出 RoHS:否 制造商:IDT 电路数量: 数据总线宽度:18 bit 总线定向:Unidirectional 存储容量:4 Mbit 定时类型:Synchronous 组织:256 K x 18 最大时钟频率:100 MHz 访问时间:10 ns 电源电压-最大:3.6 V 电源电压-最小:6 V 最大工作电流:35 mA 最大工作温度:+ 85 C 封装 / 箱体:TQFP-80 封装: |
发布紧急采购，3分钟左右您将得到回复。