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参数资料
| 型号： | 9UMS9633BKLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 166.67 MHz, OTHER CLOCK GENERATOR, PQCC48 |
| 封装： | 6 X 6 MM, 0.40 MM PITCH, ROHS COMPLIANT, PLASTIC, MLF-48 |
| 文件页数： | 3/22页 |
| 文件大小： | 208K |
| 代理商： | 9UMS9633BKLFT |
IDTTM/ICSTM Ultra Mobile PC/Mobile Internet Device
1423—01/20/09
ICS9UMS9633B
ULTRA MOBILE PC/MOBILE INTERNET DEVICE
11
Advance Information
Table 1: CPU Frequency Select Table
FSLC
1
FSLB
1
CPU
MHz
SRC
MHz
DOT
MHz
LCD
MHz
REF
MHz
0
133.33
0
1
166.67
1
0
100.00
11
Reserved
1. FS
LC is a low-threshold input.Please see VIL_FS and VIH_FS specifications in
the Input/Supply/Common Output Parameters Table for correct values.
Also refer to the Test Clarification Table.
100.00
96.00
100.00
14.318
Table 2: LCD Spread Select Table (Pin 20/21)
B1b5
B1b4
B1b3
Spread
%
Comment
0
-0.5%
LCD100
0
1
-1%
LCD100
0
1
0
-2%
LCD100
0
1
-2.5%
LCD100
1
0
+/- 0.25%
LCD100
1
0
1
+/-0.5%
LCD100
1
0
+/-1%
LCD100
1
+/-1.25%
LCD100
Table 3: CPU N-step Programming
CPU
(MHz)
P
Default N
(hex)
133.33
3
64
166.67
3
7D
100.00
4
64
200.00
2
64
= 4MHz x N/P
Fcpu
= 4MHz x N/P
0
1
Enable
Running Running
1
X
Enable
Low/20K
Low
0
0
Enable
High
Low
0X
Disable
Low/20K
Low
0
0
Enable
Running Running
Running
1
X
Low/20K
Low
Low/20K
Low
0
1
Enable
Low/20K
Low
Running
0X
Disable
Low/20K
Low
Low/20K
Low
REF Power Management Table
0
Enable
Running
1
X
Low
0
Disable
Low
SRC, LCD, DOT Power Management Table
CPU Power Management Table
PD
CPU_STOP#
SMBus Register
OE
CPU
CPU#
DOT#/LCD#
PD
CR_x#
SMBus Register
OE
SRC
SRC#
REF
PD
SMBus Register
OE
DOT/LCD
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