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参数资料
| 型号： | 9UMS9633BKLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 166.67 MHz, OTHER CLOCK GENERATOR, PQCC48 |
| 封装： | 6 X 6 MM, 0.40 MM PITCH, ROHS COMPLIANT, PLASTIC, MLF-48 |
| 文件页数： | 8/22页 |
| 文件大小： | 208K |
| 代理商： | 9UMS9633BKLFT |
IDTTM/ICSTM Ultra Mobile PC/Mobile Internet Device
1423—01/20/09
ICS9UMS9633B
ULTRA MOBILE PC/MOBILE INTERNET DEVICE
16
Advance Information
Byte
8
Reserved
Bit(s)
Pin #
Name
Control Function
Type
0
1
Default
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
0
Byte
9
LCD100 PLL N Register
Bit(s)
Pin #
Name
Control Function
Type
0
1
Default
Bit 7
LCD100 N Div7
R
X
Bit 6
LCD100 N Div6
R
X
Bit 5
LCD100 N Div5
R
X
Bit 4
LCD100 N Div4
R
X
Bit 3
LCD100 N Div3
R
X
Bit 2
LCD100 N Div2
R
X
Bit 1
LCD100 N Div1
R
X
Bit 0
LCD100 N Div0
R
X
Byte
10
Status Readback Register
Bit(s)
Pin #
Name
Description
Type
0
1
Default
7
37
FSB
Frequency Select B
R
Latch
6
9
FSC
Frequency Select C
R
Latch
5
24
CR0# Readbk
Real time CR0# State Indicator
R
CR0# is Low
CR0# is High
X
4
28
CR1# Readbk
Real time CR1# State Indicator
R
CR1# is Low
CR1# is High
X
3
36
CR2# Readbk
Real time CR2# State Indicator
R
CR2# is Low
CR2# is High
X
2
0
1
0
Byte
11
Revision ID/Vendor ID Register
Bit(s)
Pin #
Name
Description
Type
0
1
Default
7
Rev Code Bit 3
R
X
6
Rev Code Bit 2
R
X
5
Rev Code Bit 1
R
X
4
Rev Code Bit 0
R
X
3
Vendor ID bit 3
R
0
2
Vendor ID bit 2
R
0
1
Vendor ID bit 1
R
0
Vendor ID bit 0
R
1
Byte
12
Device ID Register
Bit(s)
Pin #
Name
Description
Type
0
1
Default
7
DEV_ID3
Device ID MSB
R
0
6
DEV_ID2
Device ID 2
R
0
5
DEV_ID1
Device ID 1
R
1
4
DEV_ID0
Device ID LSB
R
1
3
0
2
0
1
0
Reserved
Vendor ID
Reserved
N Divider Programming Byte9 bit(7:0) and Byte8
bit7
See N-step programming
formula
Reserved
See Table 1: CPU Frequency
Select Table
Reserved
Revision ID
(0 for A rev)
Vendor specific
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