参数资料
型号: A3941KLPTR-T
厂商: Allegro Microsystems Inc
文件页数: 12/21页
文件大小: 0K
描述: IC MOSFET FULL BRDG AUTO 28TSSOP
标准包装: 1
配置: 半桥
输入类型: PWM
延迟时间: 90ns
配置数: 1
输出数: 4
电源电压: 5.5 V ~ 50 V
工作温度: -40°C ~ 150°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
供应商设备封装: 28-TSSOP 裸露焊盘
包装: 标准包装
产品目录页面: 1140 (CN2011-ZH PDF)
其它名称: 620-1236-6
A3941
Automotive Full Bridge MOSFET Driver
tions, the output from the comparators are ignored under two
conditions:
? while the external FET is off, and
? until the end of the period, referred to as the fault blank time ,
after the FET is turned on.
When the FET is turned on, if the drain-source voltage exceeds
the voltage at the VDSTH pin at any time after the fault blank
time, then a short fault will be detected. This fault will be latched
and the FET disabled until reset.
In applications where short detection is not required, this feature
may be disabled by connecting VDSTH to V5 or by applying a
voltage greater than the disable threshold voltage, V DSDIS . This
completely disables the V DS monitor circuits, preventing detec-
tion of short faults and any indication of short faults by the fault
flags. In this condition the external FETs will not be protected by
the A3941.
Short to Supply When V DSTH is less than the disable threshold
voltage, V DSDIS , a short from any of the motor phase connec-
tions to the battery or VBB connection is detected by monitoring
the voltage across the low-side FETs in each phase, using the
appropriate Sx pin and the LSS pin. This drain-source voltage,
V DS , is continuously compared to the voltage on the VDSTH pin.
The result of this comparison is ignored if the FET is not active.
It also is ignored for one fault blank time interval after the FET is
turned on. If, when the comparator is not being ignored, its output
indicates that V DS exceeds the voltage at the VDSTH pin, then
FF2 will be high.
Short to Ground When VDSTH is less than the disable thresh-
old voltage, V DSDIS , a short from any of the motor phase con-
nections to ground is detected by monitoring the voltage across
the high-side FETs in each phase, using the appropriate Sx pin
and the voltage at VDRAIN. This drain-source voltage, V DS , is
continuously compared to the voltage on the VDSTH pin. The
result of this comparison is ignored if the FET is not active. It
also is ignored for one fault blank time interval after the FET is
turned on. If, when the comparator is not being ignored, its output
indicates that V DS exceeds the voltage at the VDSTH pin, FF2
will be high.
Shorted Load The short-to-ground and short-to-supply monitor
circuits will also detect a short across a motor phase winding. In
most cases, a shorted winding will be indicated by a high-side
and low-side fault being detected at the same time. In some cases
the relative impedances may permit only one of the shorts to be
detected.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
12
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