参数资料
| 型号： | A4403GEUTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 13/16页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 3A 16QFN |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 可调至 0.8V |
| 输入电压： | 9 V ~ 46 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 450kHz ~ 2MHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-WQFN 裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 16-QFN（4x4） |
| 产品目录页面： | 1141 (CN2011-ZH PDF) |
| 其它名称： | 620-1273-6 |
A4403
Valley Current Mode Control Buck Converter
To avoid ground offset issues in the output voltage, it is highly
recommended that the ground-referenced feedback resistor R6
should be connected directly to the GND connection of the
A4403. In other words, the R6 ground return should avoid the use
of the internal ground plane.
All ground-referenced support components (C5 and the DIS
switch) should also be located as close to the GND connection as
possible. A “local quiet” ground plane around these components
can be implemented; however, this ground plane should have a
high impedance connection to the star ground connection of the
power stages, as referenced below.
The sense resistor connections should be connected in a Kelvin
circuit (see figure 3) to the corresponding pins on the A4403
A4403 Support
Components
(ISEN and SGND). Note that it is imperative that the PCB traces
between the sense resistor pads and the sense connections are as
short as possible to minimize the effects of leakage inductance.
In noisy systems, it is highly recommended that an R-C filter be
used to filter the signal produced across the ISEN pin. See the
Sense Resistor section and the Typical Application schematic.
If an internal ground plane is used, it is recommended that it
does not overlap the switching node, LX, to avoid the possibility
of noise pick up. To minimize the possibility of noise injection
issues, it is recommended to isolate the ground plane around the
high impedance nodes, such as FB and SS.
Power Circuitry
Local ‘quiet’
Ground Plane
Switch
C5
R6
A4403
GND
SGND
Cin
D
R
Cout
Star Connection
Thermal Vias
Internal Ground Plane
Figure 4. Ground plane configurations
Input
Voltage
VIN
Q
LX
D
L
V OUT
Input
Voltage
VIN
Q
LX
D
L
V OUT
C IN
C OUT
C IN
C OUT
R
Star Connection
Figure 5. FET on-cycle current conduction paths
R LOAD
R
Star Connection
Figure 6. FET off-cycle current conduction paths
R LOAD
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
13
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