参数资料
| 型号： | A4403GEUTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 15/16页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 3A 16QFN |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 可调至 0.8V |
| 输入电压： | 9 V ~ 46 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 450kHz ~ 2MHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-WQFN 裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 16-QFN（4x4） |
| 产品目录页面： | 1141 (CN2011-ZH PDF) |
| 其它名称： | 620-1273-6 |
A4403
Valley Current Mode Control Buck Converter
Package EU, 16-Contact QFN
0.35
1
16
A
4.00 ±0.15
0.95
1
16
0.65
2
4.00 ±0.15
2
2.70
4.10
2.70
4.10
17X
D
0.08 C
SEATING
PLANE
C
C
PCB Layout Reference View
0.30 ±0.05
0.65
0.75 ±0.05
For Reference Only
(reference JEDEC MO-220WGGC)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Exposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
0.40 ±0.10
2
B
2.70
C Reference land pattern layout (reference IPC7351
QFN65P400X400X80-17W2M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
1
16
2.70
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
D Coplanarity includes exposed thermal pad and terminals
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
15
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