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| 型号： | A4490EES-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 15/17页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 1.5A TRPL 20QFN |
| 标准包装： | 92 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 3 |
| 输出电压： | 可调 |
| 输入电压： | 4.5 V ~ 34 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 550kHz |
| 电流 - 输出： | 1.5A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-WFQFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 20-QFN 裸露焊盘（4x4） |
| 配用： | 620-1388-ND - BOARD EVAL FOR A4490 |
| 其它名称： | A4490SES-T A4490SES-T-ND |
A4490
Triple Output Step-Down Switching Regulator
The VBB terminals for V REG1 and V REG2 should be connected
via short and wide traces to the VBB terminal for V REG3 .
? Each inductor should be connected as close as possible to the
respective switching FET (LX1, LX2, and LX3) and output
capacitors.
Figure 6 shows the current conduction path during the off-cycle
of the switching FET. The following points should be noted:
? The diode D should be placed as close as possible to both the
switching FET and the inductor.
? Support components: POR capacitor (C11), charge pump ca-
pacitor (C1), reservoir capacitor (C2), and VDD filter capacitor
(C12) should be located as close as possible to their respective
terminal connections. The ground referenced capacitors should
be connected as close to the GND terminal as possible.
Powering Configurations The following three diagrams show
typical configurations for providing power to the application. The
middle diagram corresponds to the typical application shown on
the front page.
6 to 34 V
Only VBB supplied
VBB
6 to 34 V
VDD applied externally (first option)
VBB
VDD applied externally (second option)
4.5 to 5.5 V
VBB
VDD
LX
L
VREG
VDD
LX
L
VREG
VDD
LX
L
VREG
D
C
D
C
D
C
Comments:
- Simple configuration, only one supply required
- Increased power losses at higher VBB voltages
- V BB start-up = 4.3 V (typical), shutdown = 4.1 V
(typical)
Comments:
- Reduced power losses at higher VBB voltages
- V BB start-up = 4.3 V (typical), shutdown = 3.5 V
(typical). In this case, the start-up threshold
(V BBUV(su) ) is higher because V REG is not present
Comments:
- Power restricted as V BB < 6 V, due to increase in
R DS(on) of buck switches
- V BB start-up = 4.2 V (typical), shutdown = 3.5 V (typical)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
15
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| A4490EESTRT | 制造商:ALLEGRO 功能描述:Pb Free |
| A4490EESTR-T | 功能描述:IC REG BUCK ADJ 1.5A TRPL 20QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
| A4491 | 制造商:ALLEGRO 制造商全称:Allegro MicroSystems 功能描述:Designed to provide the power supply requirements of printers, office automation, industrial, and portable equipment, the A4491 provides three high current, |
| A4491EESTR-T | 功能描述:IC REG BUCK ADJ 2.2A TRPL 20QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:50 系列:- 类型:升压（升压） 输出类型:可调式 输出数:1 输出电压:5 V ~ 25 V 输入电压:2.3 V ~ 5.5 V PWM 型:电流模式 频率 - 开关:600kHz，1.2MHz 电流 - 输出:1A 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 包装:管件 供应商设备封装:8-MSOP |
| A4492 | 制造商:ALLEGRO 制造商全称:Allegro MicroSystems 功能描述:Designed to provide the power supply requirements for automotive applications, the A4492 provides three high current, high performance, switching regulator outputs with independent soft start. |
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