参数资料
| 型号： | AD5315BRM |
| 厂商： | Analog Devices Inc |
| 文件页数： | 14/24页 |
| 文件大小： | 0K |
| 描述： | IC DAC 10BIT 2WIRE I2C 10-MSOP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 标准包装： | 50 |
| 设置时间： | 6µs |
| 位数： | 10 |
| 数据接口： | I²C，串行 |
| 转换器数目： | 4 |
| 电压电源： | 单电源 |
| 功率耗散（最大）： | 5mW |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 10-MSOP |
| 包装： | 管件 |
| 输出数目和类型： | 4 电压，单极；4 电压，双极 |
| 采样率（每秒）： | 143k |
AD5305/AD5315/AD5325
Rev. G | Page 21 of 24
AD5305/AD5315/AD5325 AS A DIGITALLY
PROGRAMMABLE WINDOW DETECTOR
A digitally programmable upper/lower limit detector using two
of the DACs in the AD5305/AD5315/AD5325 is shown in
Figure 39. The upper and lower limits for the test are loaded to
DAC A and DAC B, which, in turn, set the limits on the CMP04. If
the signal at the VIN input is not within the programmed window,
an LED indicates the fail condition. Similarly, DAC C and DAC D
can be used for window detection on a second VIN signal.
5V
GND
REFIN
1/6 74HC05
FAIL
PASS
1k
SCL
SDA
SCL
DIN
1k
1ADDITIONAL PINS OMITTED FOR CLARITY.
0.1F
10F
VREF
1/2
AD5305/
AD5315/
AD53251
VOUTA
VOUTB
VDD
VIN
1/2
CMP04
PASS/FAIL
009
30-
039
Figure 39. Window Detection
COARSE AND FINE ADJUSTMENT USING THE
AD5305/AD5315/AD5325
Two of the DACs in the AD5305/AD5315/AD5325 can be paired
together to form a coarse and fine adjustment function, as shown
in Figure 40. DAC A is used to provide the coarse adjustment
while DAC B provides the fine adjustment. Varying the ratio of
R1 and R2 changes the relative effect of the coarse and fine
adjustments. With the resistor values and external reference shown
in Figure 40, the output amplifier has unity gain for the DAC A
output. As a result, the output range is 0 V to 2.5 V 1 LSB. For
DAC B, the amplifier has a gain of 7.6 × 103, giving DAC B a
range equal to 19 mV. Similarly, DAC C and DAC D can be
paired together for coarse and fine adjustment.
The circuit is shown with a 2.5 V reference, but reference
voltages up to VDD can be used. The op amps indicated allows
a rail-to-rail output swing.
1F
REFIN
GND
0.1F
10F
GND
5V
VOUT
1ADDITIONAL PINS OMITTED FOR CLARITY.
R3
51.2k
R4
390
R1
390
R2
51.2k
AD820/
OP295
VDD = 5V
VDD
VOUTA
VOUTB
1/2
AD5305/
AD5315/
AD53251
AD780/REF192
WITH VDD = 5V
VOUT
VIN
EXT
REF
00
930
-04
0
Figure 40. Coarse/Fine Adjustment
POWER SUPPLY DECOUPLING
In any circuit where accuracy is important, careful
consideration of the power supply and ground return layout
helps to ensure the rated performance. The printed circuit
board on which the AD5305/AD5315/AD5325 is mounted
should be designed so that the analog and digital sections are
separated and confined to certain areas of the board. If the
AD5305/AD5315/AD5325 is in a system where multiple devices
require an AGND-to-DGND connection, the connection
should be made at one point only. The star ground point should
be established as close as possible to the device. The AD5305/
AD5315/AD5325 should have ample supply bypassing of 10 μF
in parallel with 0.1 μF on the supply located as close to the
package as possible, ideally right up against the device. The
10 μF capacitors are the tantalum bead type. The 0.1 μF
capacitor should have low effective series resistance (ESR) and
effective series inductance (ESI), such as the common ceramic
types that provide a low impedance path to ground at high
frequencies to handle transient currents due to internal logic
switching.
The power supply lines of the AD5305/AD5315/AD5325
should use as large a trace as possible to provide low impedance
paths and reduce the effects of glitches on the power supply
line. Fast switching signals such as clocks should be shielded
with digital ground to avoid radiating noise to other parts of the
board, and should never be run near the reference inputs. A
ground line routed between the SDA and SCL lines helps reduce
crosstalk between them (not required on a multilayer board as
there is a separate ground plane, but separating the lines does help).
Avoid crossover of digital and analog signals. Traces on
opposite sides of the board should run at right angles to each
other. This reduces the effects of feedthrough through the
board. A microstrip technique is by far the best, but is not
always possible with a double-sided board. In this technique,
the component side of the board is dedicated to ground plane
while signal traces are placed on the solder side.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD5315BRM-REEL | 制造商:Analog Devices 功能描述:DAC 4-CH Resistor-String 10-bit 10-Pin MSOP T/R 制造商:Analog Devices 功能描述:DAC QUAD RES-STRING 10-BIT 10MSOP - Tape and Reel |
| AD5315BRM-REEL7 | 功能描述:IC DAC 10BIT 2WIRE I2C 10-MSOP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色产品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 标准包装:91 系列:- 设置时间:4µs 位数:10 数据接口:MICROWIRE?，串行，SPI? 转换器数目:8 电压电源:单电源 功率耗散（最大）:2.7mW 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:14-WFDFN 裸露焊盘 供应商设备封装:14-DFN-EP（4x3） 包装:管件 输出数目和类型:8 电压，单极 采样率（每秒）:* |
| AD5315BRMZ | 功能描述:IC DAC 10BIT 2WIRE I2C 10-MSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 设置时间:4µs 位数:12 数据接口:串行 转换器数目:2 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 供应商设备封装:8-uMAX 包装:管件 输出数目和类型:2 电压，单极 采样率（每秒）:* 产品目录页面:1398 (CN2011-ZH PDF) |
| AD5315BRMZ1 | 制造商:AD 制造商全称:Analog Devices 功能描述:2.5 V to 5.5 V, 500 ??A, 2-Wire Interface Interface |
| AD5315BRMZ-REEL | 功能描述:IC DAC 10BIT 2WIRE I2C 10MSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色产品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 标准包装:91 系列:- 设置时间:4µs 位数:10 数据接口:MICROWIRE?，串行，SPI? 转换器数目:8 电压电源:单电源 功率耗散（最大）:2.7mW 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:14-WFDFN 裸露焊盘 供应商设备封装:14-DFN-EP（4x3） 包装:管件 输出数目和类型:8 电压，单极 采样率（每秒）:* |
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