参数资料
| 型号： | AD5737ACPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 29/44页 |
| 文件大小： | 0K |
| 描述： | IC DAC QUAD 12BIT CUR 64-LFCSP |
| 标准包装： | 1 |
| 设置时间： | 15µs |
| 位数： | 12 |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 4 |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 64-LFCSP-VQ（9x9） |
| 包装： | 托盘 |
| 输出数目和类型： | 4 电流，单极 |
| 采样率（每秒）： | * |
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Data Sheet
AD5737
Rev. C | Page 35 of 44
HART CONNECTIVITY
The AD5737 has four CHART pins, one corresponding to each
output channel. A HART signal can be coupled into these pins.
The HART signal appears on the corresponding current output,
if the output is enabled. Table 33 shows the recommended input
voltages for the HART signal at the CHART pin. If these voltages
are used, the current output should meet the HART amplitude
specifications.
Table 33. CHART Input Voltage to HART Output Current
R
SET
CHART Input Voltage
Current Output (HART)
Internal R
SET
150 mV p-p
1 mA p-p
External R
SET
170 mV p-p
1 mA p-p
Figure 54 shows the recommended circuit for attenuating and
coupling the HART signal. A minimum capacitance of C1 + C2
is required to ensure that the 1.2 kHz and 2.2 kHz HART
frequencies are not significantly attenuated at the output. The
recommended values are C1 = 22 nF and C2 = 47 nF.
HART MODEM
OUTPUT
C1
C2
CHARTx
10067-
076
Figure 54. Coupling the HART Signal
Digitally controlling the slew rate of the output is necessary to
meet the analog rate of change requirements for HART.
DIGITAL SLEW RATE CONTROL
The digital slew rate control feature of the AD5737 allows the
user to control the rate at which the output value changes. With
the slew rate control feature disabled, the output value changes
at a rate limited by the output drive circuitry and the attached
load. To reduce the slew rate, the user can enable the digital slew
rate control feature using the SREN bit of the slew rate control
register (see Table 28).
When slew rate control is enabled, the output, instead of slewing
directly between two values, steps digitally at a rate defined by
the SR_CLOCK and SR_STEP parameters. These parameters
are accessible via the slew rate control register (see Table 28).
SR_CLOCK defines the rate at which the digital slew is
updated; for example, if the selected update rate is 8 kHz,
the output is updated every 125 s.
SR_STEP defines by how much the output value changes
at each update.
Together, these parameters define the rate of change of the
output value. Table 34 and Table 35 list the range of values for
the SR_CLOCK and SR_STEP parameters, respectively.
Table 34. Slew Rate Update Clock Options
SR_CLOCK
Update Clock Frequency1
0000
64 kHz
0001
32 kHz
0010
16 kHz
0011
8 kHz
0100
4 kHz
0101
2 kHz
0110
1 kHz
0111
500 Hz
1000
250 Hz
1001
125 Hz
1010
64 Hz
1011
32 Hz
1100
16 Hz
1101
8 Hz
1110
4 Hz
1111
0.5 Hz
1 These clock frequencies are divided down from the 13 MHz internal
Table 35. Slew Rate Step Size Options
SR_STEP
Step Size (LSB)
000
1
001
2
010
4
011
16
100
32
101
64
110
128
111
256
The following equation describes the slew rate as a function of
the step size, the update clock frequency, and the LSB size.
Size
LSB
Frequency
Clock
Update
Size
Step
Change
Output
Rate
Slew
×
=
where:
Slew Rate is expressed in seconds.
Output Change is expressed in amperes.
The update clock frequency for any given value is the same for
all output ranges. The step size, however, varies across output
ranges for a given value of step size because the LSB size is
different for each output range.
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相关代理商/技术参数 |
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| AD5737ACPZ-RL7 | 制造商:AD 制造商全称:Analog Devices 功能描述:Quad-Channel, 12-Bit, Serial Input, 4 mA to 20 mA Output |
| AD5737X | 制造商:AD 制造商全称:Analog Devices 功能描述:Quad Channel, 16-Bit, Serial Input, 4-20mA Output DAC, Dynamic Power Control, HART Connectivity |
| AD573JD | 功能描述:IC ADC 10BIT SAR REG 20-CDIP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 位数:12 采样率（每秒）:3M 数据接口:- 转换器数目:- 功率耗散（最大）:- 电压电源:- 工作温度:- 安装类型:表面贴装 封装/外壳:SOT-23-6 供应商设备封装:SOT-23-6 包装:带卷 (TR) 输入数目和类型:- |
| AD573JN | 功能描述:IC ADC 10BIT SAR REGISTER 20-DIP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
| AD573JNZ | 功能描述:IC ADC 10BIT SAR REGISTER 20-DIP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:microPOWER™ 位数:8 采样率（每秒）:1M 数据接口:串行，SPI? 转换器数目:1 功率耗散（最大）:- 电压电源:模拟和数字 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:24-VFQFN 裸露焊盘 供应商设备封装:24-VQFN 裸露焊盘（4x4） 包装:Digi-Reel® 输入数目和类型:8 个单端，单极 产品目录页面:892 (CN2011-ZH PDF) 其它名称:296-25851-6 |
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