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参数资料
| 型号： | AD6620AS |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 65 MSPS Digital Receive Signal Processor |
| 中文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP80 |
| 封装： | PLASTIC, QFP-80 |
| 文件页数： | 19/43页 |
| 文件大小： | 354K |
| 代理商： | AD6620AS |
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AD6620
–19–
REV. 0
A/B
OUT
IF DV
OUT
is low, A/B
OUT
is always low. When A/B
OUT
is high,
A Channel data is available on the output. If DV
OUT
remains
high while A/B
OUT
is low, then B Channel data is on the output
pins of the chip OUT[15:0].
CLK
OUT[15:0]
VALID DATA
A DATA
t
DPR
t
DPF
t
DPF
I
Q
I
A
Q
A
DV
OUT
I/Q
OUT
A/B
OUT
Figure 33. Parallel Output Data Timing (Single-Channel
Mode)
t
DPR
t
DPF
t
DPF
t
DPF
I
Q
I
Q
I
A
Q
A
I
B
Q
B
VALID DATA
A DATA
B DATA
CLK
OUT[15:0]
DV
OUT
I/Q
OUT
A/B
OUT
Figure 34. Parallel Output Data Timing (Diversity Channel
Mode)
Serial Output Data Port
The AD6620 provides a choice of two output ports: a 16-bit
parallel port and a synchronous serial port. The advantage of
using the serial port is that all 23 bits of available data can be
output in the 24-bit or 32-bit mode. The serial output port
shares some of the same pins used by the parallel output port.
As a result, one or the other mode of output may be utilized,
but not both. The output mode must be set with a hard reset
generated by at least a 30 ns low time on the
RESET
pin. If the
PAR/SER line is low (logic “0”) upon reset, then serial output
data is activated. The PAR/SER pin should remain static after
the output mode has been set (i.e., PAR/SER should only change
when
RESET
is low).
Note that the AD6620 cannot be booted through the serial port.
The microport must be used to initialize the device, then serial
operation is supported.
Figure 35 shows the typical interconnections between an AD6620
in serial master mode and a DSP. Refer to the Serial Control
Port section for a detailed description of pin functions and pro-
cedures for writing and reading with relation to the serial port.
Note the 10 k
resistors connected to SDI and SDO. These
prevent the lines from toggling when the AD6620 or DSP
three-states these pins.
SCLK
AD6620
DSP
+3.3V
SBM
SCLK
SDI
DT
SDO
DR
SDFS
RFS
SDFE
10k
V
10k
V
SDIV
2
4
AD
WL
Figure 35. Typical Serial Data Output Interface to DSP
(Serial Master Mode, SBM = 1)
Figure 36 shows two AD6620s illustrating the cascade capability
for the chip. The first is connected as a serial master and the
second is configured in serial cascade mode. The SDFE signal
of the master is connected to the SDFS of the slave. This allows
the master AD6620 data to be obtained first by the DSP, fol-
lowed by the cascade AD6620 data.
SCLK
AD6620
DSP
+3.3V
SBM
SCLK
SDI
DT
SDO
DR
SDFS
RFS
SDFE
10k
V
SDIV
2
4
AD
WL
10k
V
SCLK
AD6620
CASCADE
SBM
SDI
SDO
SDFS
SDFE
SDIV
2
4
AD
WL
Figure 36. Typical Serial Data Output Interface to DSP
(Serial Cascade Mode, SBM = 0)
相关PDF资料 |
PDF描述 |
|---|---|
| AD6620S | 65 MSPS Digital Receive Signal Processor |
| AD6620 | 65 MSPS Digital Receive Signal Processor(采样速率65MSPS的数字接收信号处理器) |
| AD6622AS | Four-Channel, 75 MSPS Digital Transmit Signal Processor TSP |
| AD6622PCB | Four-Channel, 75 MSPS Digital Transmit Signal Processor TSP |
| AD6622S | Four-Channel, 75 MSPS Digital Transmit Signal Processor TSP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD6620AS-REEL | 制造商:Analog Devices 功能描述:Signal Processor 80-Pin PQFP T/R |
| AD6620ASZ | 功能描述:IC DGTL RCVR DUAL 67MSPS 80-PQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1 |
| AD6620ASZ-REEL | 功能描述:IC DGTL RCVR DUAL 67MSPS 80-PQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1 |
| AD6620PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:65 MSPS Digital Receive Signal Processor |
| AD6620S | 制造商:AD 制造商全称:Analog Devices 功能描述:65 MSPS Digital Receive Signal Processor |
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